Embedded Computing Design

Sarth Rana

Senior VLSI Engineer

Softnautics

Sarth Rana is a Senior VLSI Engineer at Softnautics, a microelectronics enthusiast having experience working in RTL designs and verifying complicated ASICs like USB, and PCIe. He has worked on FPGAs, High-speed memory Verification, Functional verification, Low power verification, and Assertion based verification. His hobbies include sketching and reading books.

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Processing

Multi Voltage SoC Power Design Technique - Blog

September 14, 2022
Sarth Rana Softnautics  

Minimizing power consumption is a major factor that contributes to the modern-day development of IC designs, especially in the consumer electronics segment. The heating of the devices, the time it takes to turn on/off the features of handheld devices, battery life, etc are still under reforms. Hence it becomes important that best practices of chip design are adopted to aid the power consumption in SoCs (System on Chip) and other ICs (Integrated Circuit).

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