Sr. Director, Next Gen Platforms, Western Digital; Chairman of CHIPS Alliance and Member Board Of Directors at RISC-V

Western Digital Corporation

Fundamental background in computer architecture, memory device technologies, machine learning and inference hardware acceleration. Managing Western Digital RISC-V CPU architecture and design project, as well as Machine Learning Hardware Acccelerator project. Deep pplications and innovations experience in Storage and compute systems, Memory Architecture and Electronics design.

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Open Source

A new era of storage: Open compute with RISC-V and memory fabrics - Story

February 21, 2018

In the last few years, we have witnessed a massive change in how data is generated, processed and further leveraged to garner additional value and intelligence.

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