Digital Verification Engineer with 2+ years of experience in -Working in service based industry providing technological solutions. -ASIC Digital Functional Verification -Working on SoC level verification of motion sensor based SoC. -Working with SV/UVM -Getting Closure for Functional/ Code/ Assertion Coverage. -Persistent Debugging and finding root cause for every issue TECHNICAL SKILLS: Languages & Methodology: UVM, SystemVerilog, Verilog, VHDL, Perl, Shell Scripting, C.

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Debug & Test

Effective Reporting of UVM Transaction - Custom Transaction Printer - Story

August 21, 2020

With the increasing area and complexity of the system-on-chip(SoC) design, there is a huge responsibility and workload on verification, making it the bottleneck of the entire SoC design flow.

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