Codasip expanded its adoption of formal verification solutions for comprehensive and thorough processor testing with the addition of OneSpin IC verification tools from Siemens EDA.

Imperas Software Ltd., the leader in verification solutions for RISC-V, and Codasip, the leader in customizable RISC-V processor IP, today announced that Codasip has adopted Imperas reference designs and the Imperas DV solution for Codasip IP.

IAR Systems and Codasip announced their partnership enabling joint customers to build low-power embedded applications based on RISC-V. Following this, version 2.11 of IAR Embedded Workbench for RISC-V now supports the L30 and L50 processors from Codasip.

By integrating Aldec?s Riviera-PRO? with Codasip?s Studio?, verification of custom instructions at the RTL implementation level becomes an incredibly powerful platform for RISC-V processor deployment.