Hello Embedded Professionals, Engineers, and Developers! Welcome to In Case You Missed it, the weekly news show all about Embedded technologies and solutions from Embedded Computing Design.

Codasip announced it will put more focus of its business into cyber-resilient semiconductor architectures and semiconductor System on Chips (SoCs). Because of the change, the company will divest its low-end RISC-V processor design business to a public US semiconductor company.  The purchaser will also take a broad license to Studio, Codasip’s processor EDA tool that allows rapid customization of Codasip processor cores. The acquisition is planned to close in a month.

Codasip publicized that its RISC-V Codasip L735 and Codasip L739 earned TÜV SÜD certification for functional safety. The L735 has been certified up to ASIL-B, while the L739 has been qualified up to ASIL-D defined by ISO 26262.

Codasip has made an exploration platform available based on the Codasip X730 application core, which integrates CHERI (Capability Hardware Enhanced RISC Instructions).

Munich, Germany. Codasip generously donated its newly developed Software Development Kit (SDK) for CHERI to the communal CHERI Alliance, and makes the SDK freely available for download on GitHub. CHERI (Capability Hardware Enhanced RISC Instructions) is an innovative security technology established by the University of Cambridge in collaboration with SRI International.

Writing my Exploited articles and traveling to our next stop, my head was brought to Sun Tzu, and his quote from The Art of War, “The art of war is of vital importance to the State. It is a matter of life and death, a road either to safety or to ruin.” Sounds drastic but let us think about all the data floating around ready for anyone with a means to just snatch it.

Codasip, along with Intel, are providing educational tools for future RISC-V developers in the form of undergraduate and graduate curriculum combing assets such as Codasip RISC-V IP cores, Codasip Studio development environment, and Intel's FPGA platforms. The provided lessons use a project-based RISC-V learning opportunity.