SmartDV
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SmartDV Joins the Xilinx Partner Program - Press Release
June 21, 2021Xilinx-Compliant Design IP Accessible to Xilinx Customers through Partner Program
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SmartDV Announces Support for ARINC Standards with Design and Verification IP - News
June 07, 2021SmartDV Technologies announced support of the ARINC standards with its Design and Verification IP.
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SmartDV Automation Tool Suite Accelerates Protocol Debug, Testbench Creation - News
May 17, 2021SmartDV has packaged the SmartViP Debug, a tool designed for automated protocol debugging, and SmartTestBench, which automatically generates testbench files and includes a variety of verification scenarios, into a unified automation tool suite. By identifying protocol violations and presenting them in graphical views or through tabular or text-based representations, the combined offering helps eliminate manual verification processes.
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SmartDV, Aldec Partner to Link SmartDV's Verification IP with Aldec's Riviera-PRO Simulator - News
July 23, 2020SmartDV Technologies and Aldec inked an agreement linking SmartDV's Verification IP with Aldec's Riviera-PRO high-performance simulation and debugging tool.