Infrastructure communication networks – 5G mobile, utilities, cable, transportation, defense and data centers – acquire and maintain signals for precise timing from Global Positioning System (GPS) or other worldwide satellite constellations. These networks require redundant backup systems when Global Navigation Satellite System (GNSS) signals are unavailable.

Networked and connected home appliances enable both users and manufacturers to communicate with them via the internet. For example, the user of a kitchen oven might look up a new recipe online or a manufacturer might perform remote diagnostics or over-the-air firmware updates. Displays and touch sensors are essential for enabling this functionality in modern appliances.

Microchip Technology announced the release of a high-precision voltage reference (Vref) IC that is designed for automotive and industrial applications that require low drift, high reliability, and high performance.

Bandwidth growth, driven by the expansion of data centers and 5G network build-outs, is expected to drive the need for faster coherent Dense Wavelength Division Multiplexing (DWDM) pluggable optics. Consequently, Data Center Interconnect (DCI) and metro Optical Transport Network (OTN) platforms are transitioning from 100/200G to 400G pluggable coherent optical modules to support these hyper-connected architectures.

Microchip joins the defense agency’s innovation initiative that gives its researchers better access to commercial technologies and tools.

META-DX2L enables routers, switches, and line cards to double their bandwidth by transitioning to 112G PAM4 interface rate.

The need to combine performance with low power consumption in edge compute applications has driven demand for Field Programmable Gate Arrays (FPGAs) to be used as power-efficient accelerators while also providing flexibility and speeding time to market. However, a large majority of edge compute, computer vision, and industrial control algorithms are developed natively in C++ by developers with little or no knowledge of underlying FPGA hardware.