Microchip RISC-V FPGA SoC, Tools Provide Mid-Range Power, Performance and Thermal Alternative

By Brandon Lewis


Embedded Computing Design

December 07, 2021


Microchip RISC-V FPGA SoC, Tools Provide Mid-Range Power, Performance and Thermal Alternative

Both Xilinx and Intel are prioritizing the data center, which is driving programmable logic R&D towards high-performance sockets. In some cases, these trends are influencing the evolution of applications in the embedded electronics sector as well. But there are countless applications for which power consumption and heat dissipation are just as, if not more, important than performance. These use cases are often found at the edge and encompass everything from sensor hubs to display controllers to image processing and AI inferencing platforms.

Yes, applications engineers, OEMs, and integrators developing these solutions need to advance performance and increase workload versatility. But they also need stay within cost, power, and thermal constraints.

For this reason, Microchip continues to innovate within its PolarFire FPGA SoC family – most recently with the MPFS025 SoC that features 25K logic elements and a hardened quad-core RISC-V CPU.

According to the company, the MPFS025 SoC delivers:

  • Up to 50% less power than competitive SRAM FPGA SoC offerings
  • A 300 MHz fabric and 450 MHz DSP pipeline for leading 4K60 transport and processing efficiency
  • Four multi-rate, multi-protocol 12.7 Gbps transceivers
  • Robust IP protection rooted in a cryptographically-controlled supply chain

Efficient Programmable Performance

Despite its performance and security benefits, efficiency is the headliner with Microchip’s MPFS025 PolarFire FPGA SoCs. As you can see in the graph below, this manifests in a CoreMark score of 5200 at just 1.2 W.

This is possible thanks to 32 integer and 32 floating-point registers on the primary RISC-V RV64GC core, as well as 68 math blocks that are organized into 18 x 18 MACCs. And those lookup tables are fractionable, which means they can be reduced to say, two 9x9s, so calculations can bed optimize to different bit resolutions.

Why does that level of efficiency matter, really? Well, the obvious answer is any system design with inherent power sensitivities stands to benefit. But going deeper, consider that higher performance typically means higher frequencies and voltage to more circuits, which results in excess heat generation.

Tim Morin, Director of Product Marketing for FPGAs at Microchip says that it costs roughly $1.5/W to dissipate heat, so if you can maximize performance with the fewest possible circuits fired up you can either lower system costs or deploy your design into harsher environments, or both.

RISC-V to the Rescue in Embedded Image Processing

But back to RISC-V. Beyond processing efficiency, another advantage of the on-chip RISC-V cores is that they allow general embedded engineers to run familiar Linux and/or RTOSs on a programmable logic-based device.

Once these developers get comfortable developing on the FPGA SoC with software tools like version 2021.2 of Microchip’s Libero Design Suite, they will find a flexible 2 MB L2 cache and LPDDR4 memory support at their disposal for application development.

The MPFS025 PolarFire FPGA SoC’s combination of features make it almost plug-and-play in embedded vision system designs. The below diagram shows the SoC at the heart of an image processing pipeline, requiring that engineers just integrate sensors on the front end and external memory or a display on the output.

Of course, developers will want to add more value than that. And in many cases that value will be at the application level. To that end, the Microchip MPFS025 PolarFire FPGA SoC supports open development frameworks like OpenVX as well as more targeted solutions like the VectorBlox Accelerator Software Development Kit (SDK).

The VectorBlox SDK pairs with AI IP that can be accessed in Libero to help developers with no prior machine learning experience optimize neural network algorithms like shutterless compensation or image enhancement for execution on PolarFire FPGA SoCs. The VectorBlox/PolarFire FPGA SoC combination achieves 2-3x power efficient inferencing than other solutions.

Also on the tools front, Microchip has released the Smart Embedded Vision platform ahead of the 2021 RISC-V summit. The Smart Embedded Vision platform integrates all the building blocks RISC-V application developers need to create an embedded vision or IoT edge computing solution, including:

  • Dual 4K MIPI CSI-2 cameras
  • HDMI® 2.0 with FPGA Mezzanine Card expansion
  • CoaXPress® 2.0
  • SDI (6 Gbps and 12 Gbps)
  • Universal Serial 10 GE Media Independent Interface (USXGMII) MAC IP with auto-negotiation
  • USB 3.1 Gen 1 and Gen 2 protocol support

Make the Most of the Mid-Range

Applications should dictate the technology, not the other way around, so Microchip will continue evolving its mid-range FPGA SoC portfolio with devices like the MPFS025. Silicon is expected in Q1 2022.

One final important consideration for those new to RISC-V is the growing ecosystem that can help accelerate and protect your engineering investments. Microchip’s Mi-V RISC-V ecosystem, for example, is supported by free and commercial software and tools from AdaCore, Amazon FreeRTOS, DornerWorks, Green Hills Software, Hex Five, Siemens Embedded, Veridify Security, and Wind River in to get vision systems built on the platform ready for market.

And because it’s an open standard, code developed for the PolarFire device can scale up and down the Microchip FPGA SoC portfolio, as well as to other RISC-V RV64GC targets without you having to start from scratch.

The bottom line: don’t get forced into high performance or stuck in the mid range. For more on the MPFS025 and information on getting started, visit www.microchip.com/en-us/products/fpgas-and-plds/fpga-design-resources/low-power-fpgas.

Brandon is responsible for guiding content strategy, editorial direction, and community engagement across the Embedded Computing Design ecosystem. A 10-year veteran of the electronics media industry, he enjoys covering topics ranging from development kits to cybersecurity and tech business models. Brandon received a BA in English Literature from Arizona State University, where he graduated cum laude. He can be reached at [email protected]

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