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Articles related to SiFive

SiFive Announces Licensable RISC-V P650 Processor IP Core - Blog

December 08, 2021

San Francisco-based fabless semiconductor company SiFive has launched its second high-performance processor P650 claiming to be the fastest licensable RISC-V processor IP core in the market. Within 6 months of the initial launch of the P550, the manufacturer realized the need for some significant upgrades in terms of the performance directly linking to the clock speed frequency.


New P650 the “Fastest Licensable RISC-V Processor IP Core,” SiFive Says - News

December 07, 2021

SiFive, Inc. has announced the Performance P650 processor, a coherent multicore processor that scales to 16 cores and is what the company calls the “fastest licensable RISC-V processor IP core.” The new modular 64-bit CPU core uses a 13-stage out-of-order core pipeline and advanced branch prediction to deliver a 40% performance improvement per clock cycle over its predecessor, the P550.


SiFive Performance P550 Core Sets New Standard as Highest Performance RISC-V Processor IP - News

June 22, 2021

SiFive launched the new SiFive Performance family of processors.

Open Source

Embedded Executive: James Prior, Head of Global Communications, SiFive - Podcast

June 09, 2021

Is Intel teaming up with SiFive to produce RISC-V chips? It depends how much you read between the lines in a recent release from SiFive.

Open Source

aicas GmbH, SiFive Collaborate to Integrate RISC-V CPU architecture, JamaicaVM Java-Based Software Management - News

April 19, 2021

aicas GmbH and SiFive are collaborating to integrate the RISC-V CPU architecture and JamaicaVM Java-based software management.

Open Source

aicas and SiFive Bridge Flexibility and Performance with RISC-V, JamaicaVM Integration - Press Release

March 02, 2021

AWS, SiFive, and aicas during embedded world 2021 will deliver a virtual demonstration of AWS IoT Greengrass 2.0 running on a SiFive RISC-V unmatched board.

Open Source

Is SiFive the RISC-V Standard Bearer, or a Design Mercenary? - Podcast

August 27, 2020

Is the RISC-V standard bearer ditching its heritage to become a design mercenary by using Arm? Or is this a longer-term play to help get RISC-V technology into SoCs so it can grow from there?