Upbeat Technology and SiFive, Inc. introduced the UP201/UP301 family MCU, a dual-core RISC-V microcontroller engineered for ultra-low power efficacy. The companies plan to exhibit the solutions at the upcoming RISC-V Summit in Santa Clara, California from October 22–23, 2025.

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In a big announcement for the RISC-V community, SiFive and Red Hat have made public a new collaboration between the two to bring Red Hat Enterprise Linux support to RISC-V. More, according to the release, Red Hat Enterprise Linux 10 is now available in developer preview on the SiFive HiFive Premier P550 platform.

SiFive today announced its new SiFive Intelligence XM Series, which the company says is designed for accelerating high performance AI workloads.

As you might expect, the code base in the software-defined vehicle is growing in leaps and bounds, with more features being added and the functionality within those features growing (and becoming more complex).

Is the downside to that ballooning code base the fact that more holes are being introduced to welcome hackers?

Munich, Germany. SiFive, Inc. announced an innovative design of its SiFive Essential product family at the RISC-V Summit Europe 2024. With over a decade of development, the Essential IP has demonstrated its field-proven reliability and is currently in use in billions of products, including mobile phones, sensors, SSDs, FPGA platforms, surveillance cameras, smartwatches, and more.

Here are the nominees for Best in Show at the 2023 RISC-V Summit North America.