SiFive Announces Licensable RISC-V P650 Processor IP Core

By Abhishek Jadhav

Freelance Tech Writer

December 08, 2021

Blog

SiFive Announces Licensable RISC-V P650 Processor IP Core

San Francisco-based fabless semiconductor company SiFive has launched its second high-performance processor P650 claiming to be the fastest licensable RISC-V processor IP core in the market. Within 6 months of the initial launch of the P550, the manufacturer realized the need for some significant upgrades in terms of the performance directly linking to the clock speed frequency.

Throughout the last decade, RISC-V instruction set architecture has gained substantial rapid adoption in a wide range of applications from automobiles and data centers to high-performance computing processor cores. The revolutionary computing era has witnessed a breakthrough across technological advancements in the way processors are built. RISC-V rooted P650 processor core is the next leap towards designing a faster processing speed for data-intensive and power-hungry workloads.

“The introduction of the SiFive Performance P650 processor IP, coming so quickly on the heels of the SiFive Performance P550 processor, shows how devoted SiFive is to driving the RISC-V processor architecture deep into the data center and applications with similar high-performance requirements,“ said Steve Leibson, Principal Analyst at TIRIAS Research. “The company’s announced plans for 16-core, coherent processor complexes based on this IP will deliver considerable computing performance and requires the commitment of significant development resources, which are simply out of reach for many other companies playing in the RISC-V processor IP arena.”

Initial release of the P550 marked a disruptive step toward designing the processor core based on RISC-V instruction set architecture that outperformed an Arm Cortex-A75 chip by 31% in SPECint2006. The all-new P650 is expected to go beyond the boundaries of architectural attainment with hypervisor and virtualization support. The processor builds on the performance laid down by its predecessor by expanding the processor instruction-issue width to deliver a 40% performance increase per clock cycle.

Architecture of SiFive P650 Processor Core

[Image Credit: SiFive]

The P650 processor IP offers a thirteen-stage, four-issue, out-of-order pipeline with best-in-class performance. The architecture enhancement has boosted the maximum clock frequency with a 50% performance increase over the P550 processor core. The hypervisor extension and system-level virtualization enable next-generation applications to satisfy the requirements of the emerging data centers. 

The architecture of P650 looks similar to the previous high-performance processor core, but the upgrades increase the computing speed. The new architecture offers private L2 caches and streaming prefetchers for improved memory performance. With P650 comes the single error correction double error detection hamming code with error reporting for improved safety mechanism. The 65-bit RISC-V process design has Sv39/Sv48 (MMU) virtual memory support that was already present in the former processor IP.

When it comes to security, P650 features SiFive’s WorldGuard system security for isolated code execution and data protection. “SiFive WorldGuard offers core-driven and process-ID driven modes for multi-domain security, to offer data protection for core, cache, interconnect, peripheral, and memory.” The semiconductor company believes this to be the next step towards integrating RISC-V-based processor IP in next-gen performance-hungry applications.

Availability of SiFive P650 Processor Core

The architecture preview to certain lead customers will be offered in Q1 of 2022 and available from mid-year. More product details will be showcased in a keynote presentation by Dr. Yunsup Lee at the RISC-V Summit 2021.

Abhishek Jadhav is an engineering student, freelance tech writer, RISC-V Ambassador, and leader of the Open Hardware Developer Community.

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