Cupertino, California. Ventana Micro Systems Inc. released its Veyron V2, claiming it is the most powerful, and complete RISC-V processor offered in the form of chiplets and IP. A 40% performance improvement was created utilizing significant microarchitecture enhancements, superior high performance processor fabric architecture, and enhanced cache hierarchy. A Software Development Kit (SDK) is delivered with proven software building blocks from Ventana’s RISC-V platforms.

RISC-V Summit, San Jose. Ventana Micro Systems Inc.’s founder and CEO Balaji Baktha will present Ventana’s Veyron family at his RISC-V Summit keynote address. The standards based Veyron V1 is a RISC-V processor that will come in chiplets and IP assisting in single thread performance targeting solutions for data centers, automotive, 5G, AI, and client applications.

CUPERTINO, Calif. Ventana Micro Systems Inc. released its standards-based data center class of RISC-V computing, the Veyron V1. The Veyron V1 is a member of Ventana’s Veyron family of high-performing RISC-V processors. According to Ventana, Founder and CEO Balaji Baktha will speak on the many features of the Veyron family during his RISC-V Summit keynote. Highlights are expected to include, an eight wide and aggressive out-of-order pipeline, 3.6GHz, 5nm process technology, 16 cores per cluster, high core count multi-cluster scalability up to 128 cores, and 48MB of shared L3 cache per cluster.