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Articles related to eInfochips

Reduce DFT Footprints in ASIC Design by Addressing Test Time - Story

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An Approach Using Test Channel Reduction to save Testing Cost

Analog & Power

Setup Violation Fixing in Timing Critical Complex Designs Using Late Clocking - Story

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Now a days the performance of these chips and clock frequencies are going higher and higher to meet the high-speed data traffic over the internet, or intensive CPU tasks itself.

Debug & Test

Effective Reporting of UVM Transaction - Custom Transaction Printer - Story

August 21, 2020

With the increasing area and complexity of the system-on-chip(SoC) design, there is a huge responsibility and workload on verification, making it the bottleneck of the entire SoC design flow.

AI & Machine Learning

A Step by Step Guide to Voice Enabled Device Testing - Blog

June 24, 2020

It has been said that devices cannot do everything that humans can do. However, the devices that we use in our daily lives have been evolving over the last couple of decades.


High Speed PCB Design Precautions to Reduce EMI - Story

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This document is written based on the practical observation of electromagnetic interference from high-speed signals and power switchers, which can cause failure in the certification process.

Debug & Test

Performing End-to-End Traffic Traceability Using Functional Coverage - Story

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For each of the functional features of a DUT to verify, all possible stimulus generation is developed through test cases and with the help of scoreboard, models, checkers, and assertions.


Incorrect Pronunciation Detection in eLearning using Deep Learning - Story

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A system with a variety of test paragraphs is specially designed to test end-users pronunciation skills and detect incorrectly pronounced words.