As consumers, we are fascinated with gadgets. We own more of them than ever before and we use them several times a day. We check the weather and temperature, count steps, connect with drivers who will take us across town, secure homes, and measure heart rates. These represent only a fraction of the ever-expanding applications in the Internet of Things (IoT) where convenience, information, access, and insights are at our fingertips. With the adoption of new and sophisticated technologies like artificial intelligence and deep learning, coupled with the integration of low-power sensors and long-range connectivity, there is seemingly no limit to the capabilities and services that will be created for our day-to-day lives. We have an insatiable appetite for the next cool thing and demand that our everyday products are differentiated, yet familiar; fully-featured, yet long-lived; stylish, yet practical; and safe and secure. How will the designers of these future devices keep delivering on these demands?

Chip designers are now under pressure to deliver new IoT technologies, and their success will depend on the ability to effectively deploy these new technologies within the design constraints of products that need to be small, mobile, low power, and connected. Designers will need an increased focus on selecting appropriate processors to deliver the new technologies to fit the needs of these devices – and they’ll need to consider how they will deliver these features today, with the flexibility to future-proof right from the start.

Whether augmenting your world, recognizing your voice, steadying your hand, keeping you safe or storing your data, designers of SoCs battle the ever-increasing performance versus power paradox that is at the center of many IoT design choices. More features, more sensors, and more software means the need for more processing performance. That means more storage, more signal processing, more power consumption, and consequently less battery life – all at odds with our requirements for IoT.

This does not have to be the case, though, if smart design choices are made when selecting the processor for these increasingly computationally intensive workloads. Efficiency and differentiation start at the beginning of the design process and should not be seen as something that can be added in later. Starting with a configurable and extensible digital signal processor (DSP) is a great way of achieving what might be perceived as a design impossibility

Despite the popularity and use of standard processors or controllers, which is more a symptom of familiarity than suitability, a DSP with a rich instruction set architecture (ISA) and extensibility can offer significant advantages when it comes to building devices with conflicting requirements.

Standard processors have limited capabilities, including limited instruction sets, limited I/O bandwidth, and no extensibility. This means there is no way to create a truly differentiated and efficient solution for the next generation of IoT applications. For these compute-intensive and high algorithmic workloads, a DSP with a rich and extensible instruction set enables higher math performance density versus a standard processor or GPU. This gives the extensible DSP the edge when it comes to overcoming the performance-versus-power paradox inherent in these devices. When you add in the ability to move data in and out of the processor at very high speeds outside of the system bus, this makes for data processing efficiency that is unmatchable with a standard CPU or GPU.

An alternative solution is to use hardware (RTL) to solve an algorithmic or data-intensive problem. This approach can often be the most power-efficient type of solution, but with one major drawback: RTL hardware solutions are not programmable and will need an expensive re-spin, re-design, or engineering change order (ECO) of the chip, making them inflexible to future changes or potential errors in the initial design.

An extensible DSP with a rich instruction set gives the SoC designer the opportunity to create chips that can handle these new workloads efficiently, while also allowing re-programmability and having the capability to run any new or unforeseen functions or protocols, either with the rich DSP ISA or through instruction set extensions. An extensible DSP represents an excellent choice for IoT chip designers, offering performance with configurability and extensibility and providing ultimate flexibility to meet the changing demands of tomorrow’s IoT devices.

Check out Part 2 of this series, where we will explore what to look for when choosing a DSP for your next-generation IoT application.

Paul Garden is Product Marketing Director for the Tensilica Xtensa Processor IP at Cadence. With over 20 years of product marketing experience, Paul’s background covers a broad range of technologies including Processor and DSP IP and microcontrollers. Paul has successfully marketed his products into multiple segments worldwide including the Internet of Things, Mobile, Automotive, and Embedded SoC markets.