Lattice Introduces Logic-Optimized General Purpose FPGAs
July 19, 2024
News
Hillsboro, Oregon. Lattice Semiconductor added its logic-optimized Lattice Certus-NX FPGA devices to its FPGA portfolio. The Certus-NX-28 and Certus-NX-09 support power efficiency, small size, and adaptable migration preferences. The solutions are built on the Lattice Nexus FPGA platform.
“Lattice is committed to delivering continued innovation in small, low power FPGAs to empower our customers with optimized solutions for space-constrained applications ranging from sensor interfacing to co-processing to low power AI,” said Dan Mansur, Corporate Vice President, Product Marketing, Lattice Semiconductor.
Highlights:
- Power Efficiency with PCIe Gen 2
- Up to 4X Lower Power
- FD-SOI process technology
- Up to 3X small form factor
- Highest I/O count per package with up to 2X more I/O per mm2
- PCIe and Gigabit Ethernet implementation in packages as small as 36 mm2
- Up to 100X lower soft error rate
- Built-in SEC and memory block ECC for SEU protection
Reinhard Heizmann, Head of Distance Sensors R&D, Sensing Efficiency at SICK AG, said “With the new Lattice Certus-NX devices, we are able to optimize the right memory / LUT footprint, low power density, small packages, and migration options required for our sensors.”
For more information, visit Lattice Certus-NX FPGA Family, Lattice Nexus Platform, and Lattice Radiant Software.
Chad Cox. Production Editor, Embedded Computing Design, has responsibilities that include handling the news cycle, newsletters, social media, and advertising. Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature.
