MIPS is working with Intel to accelerate innovation in open computing

RISC-V is an open-source instruction set architecture (ISA) built on the principles of the reduced instruction set computer (RISC), which was first created at the University of California, Berkley. It enables open modular building blocks necessary for contemporary computing.

Intel and the RISC-V Foundation have collaborated on an initiative to further expedite the expansion of RISC-V architecture with the launch of the Intel® Pathfinder for RISC-V, a pre-silicon developer environment equipped with RISC-V cores, a set of IPs, and various operating systems and toolchains.

Codasip, announced that it is making its 32-bit L31 core accessible with the Professional Edition of the Intel® Pathfinder for RISC-V* program. Codasip is moving its embedded RISC-V technology for prototyping, production design, and research purposes using Intel FPGAs.

Premio Inc. released its ACO-6000-CML In-Vehicle Computers now supporting Intel® 10th Generation CML-S (Comet Lake S) and Xeon® W processors. This industrial-grade computer is the latest addition to Premio’s railway and in-vehicle (ACO-6000 Series) portfolio of fanless and high-performance embedded designs.

In this article, we will cover the methods in which compute-based platforms can be updated in the field in a secure, manageable, and observable fashion.

Intel released an open source tool to migrate code to SYCL1 through a project called SYCLomatic, which helps developers port CUDA code to SYCL and C++ to accelerate cross-architecture programming for heterogeneous architectures.