Barcelona, Spain. RISC-V International will be highlighting the latest RISC-V innovations across industry and the research community during the first ever RISC-V Summit Europe. The summit will be in Barcelona during the 5^th and 9^th of June 2023.   

I remember being in kindergarten and watching the Challenger rip apart 73 seconds after launch. There were two classes in the room that day watching the TV in shock, and me, with the wonder of what is really out there. Haruki Murakami in Kafka on the Shore sums up perfectly how I perceive space. “Beyond the edge of the world there’s a space where emptiness and substance neatly overlap, where past and future form a continuous, endless loop. And, hovering about, there are signs no one has ever read, chords no one has ever heard.”
 

RISC-V International announced its first four specification and extension approvals of 2022 – Efficient Trace for RISC-V (E-Trace), RISC-V Supervisor Binary Interface (SBI), RISC-V Unified Extensible Firmware Interface (UEFI) specifications, and the RISC-V Zmmul multiply-only extension.

Renesas Electronics Corporation's RZ/Five employs the Andes AX45MP, based on the RISC-V CPU instruction set architecture (ISA). The RZ/Five augments Renesas’ previously available Arm® CPU core-based MPUs, expanding customer options and providing more flexibility in the product development process.

Champions of the open-standard ISA expect it to start displacing competitive offerings en masse over the next few years. While that remains to be seen, the introduction of custom RISC-V instruction extensions, the formation industry-specific working groups, and advances in tools are redefining the technology’s true winners.

San Francisco-based fabless semiconductor company SiFive has launched its second high-performance processor P650 claiming to be the fastest licensable RISC-V processor IP core in the market. Within 6 months of the initial launch of the P550, the manufacturer realized the need for some significant upgrades in terms of the performance directly linking to the clock speed frequency.

RISC-V members ratified the Vector, Scalar Cryptography, and Hypervisor specifications, which will help unlock new opportunities for developers creating RISC-V applications for artificial intelligence (AI) and machine learning (ML), the Internet of Things (IoT), connected and autonomous cars, data centers, and beyond.