Hillsboro, Oregon. Lattice Semiconductor  released its latest updates to the Lattice Automate and Lattice sensAI solution stacks. Utilizing low-power Lattice FPGAs, the solutions create effective, customizable, and protected Industrial application development.

With a goal of bringing power efficiency, small size, and high performance to mid-range FPGAs, Lattice’s Avant architecture fits the bill while adding in advanced connectivity. Applications that can surely take advantage of this feature set include communications, computing, industrial, and automotive. Specifically, Avant is up to 2.5x lower power than similar class competitive devices; up to 2x faster throughput at lower power than similar class competitive devices; and up to 6x smaller package size compared to similar class competitive devices.

The Lattice Avant platform will be the foundation for multiple new feature-rich mid-range FPGA families and is purpose-built to expand Lattice’s power efficient architecture, small size, and performance leadership more parts of the FPGA market. Designed for scalability, Lattice Avant provides the base technology for a multitude of FPGA variants optimized for different applications across the Industrial, Automotive, Communications, and Computing markets. The distributed resources on our FPGAs’ fabric can process data in parallel at a lower operating frequency that other types of processors and, when compared with similar class competitive devices, Avant-based FPGAs are up to 2.5X more power efficient.

Sometimes problems are so obvious that you don’t see them. That was the case with the mid-range FPGA market and, frankly, until it was pointed out to me, I wasn’t aware that the problem even existed.

Machine learning inference, video processing, and edge networking workloads are built on ultra-reliable data transfer capabilities, be it on chip between memory and logic elements or off chip to peripherals or other devices. Requirements vary by application and even function, making flexibility in processing performance and power consumption, memory operations, and interconnect support foundational to the success of any embedded edge system.

Lattice Semiconductor revealed its Lattice Avant, a new FPGA platform with 2.5X lower power, 2X faster throughput at lower power, connectivity with configurable SERDES up to 25 Gbps, PCIe Gen 4, high performance I/O including memory interface support for LPDDR4 and DDR5, software support leveraging existing Lattice software solutions, and in a 6X smaller package size.

The 5G standard seems to be working through the embedded industry at a snail’s pace when you compare it to other aspects of our technology sector. Why is that, and what do you do about it if you’re a design engineer?