BOSTON, MA. The Consortium for Information & Software Quality (CISQ) issued the Cost of Poor Software Quality in the US: A 2022 Report. In its report, CISQ discovered weak software performance in the US is now costing companies $2.41 trillion, while the technical debt (the cost of reworking suboptimal software) of the accumulated software has risen around $1.52 trillion.

Demand for SoCs with extremely low power consumption remains high, be it for IoT, mobile, HPC, automotive, cryptocurrency, or AI. As the technology scales down further and system complexity increases, SoC designers rely on memories and logic libraries that consume very low power.

We’re more connected than ever. Whether you are accessing your thermostat from across the globe or watching furry friends over the pet cam, all that connection—the data transmitting from cloud to car, from phone to bank, from data center to TV—is susceptible to physical attacks and tampering.

As multi-die systems grow more prevalent in the semiconductor space, the Universal Chiplet Interconnect Express (UCIe) specification is taking center stage.

BEAVERTON, OREGON. Tektronix, Inc., in collaboration with Anritsu Corporation, announced a solution that enables testing of PCIe® 6.0 (Base) receivers and transmitters and addresses the demands of next-generation high performance systems. With this release, Tektronix provides a cohesive PCIe 6.0 transmitter and receiver test solution that delivers faster test times, higher-quality measurements, and an intuitive user interface.

There hasn’t been another time in recent memory where semiconductors have become as critical to fueling the electronics industry’s economic framework. This has become abundantly clear with the global chip shortage, which continues to distress industry sectors from automotive to consumer electronics.

With growing compute requirements and tighter design schedules, semiconductor companies are constantly being tested to deliver both complex functionality and exceptional performance very quickly. Irrespective of where the customer is in their cloud journey, designers need to drive greater productivity and efficiency for complex chip design flows.