Silex Insight Launches DDR Encrypter for High-Performing Systems (ASIC/FPGA)

By Tiera Oliver

Associate Editor

Embedded Computing Design

March 07, 2022

News

Silex Insight Launches DDR Encrypter for High-Performing Systems (ASIC/FPGA)

Silex Insight, a provider of cryptographic IP solutions, is now extending their offering by launching a high throughput DDR encrypter (100Gbps).

The DDR encrypter IP Core module enables on-the-fly encryption and authentication to the external memory. It is highly configurable and may be optimized for various size, throughput, and latency trade-offs. The core is device independent and is highly portable.

Many ASIC/FPGAs are now system on chip devices that contain an embedded processing hard-block. When data confidentiality is essential, it is necessary to protect the confidentiality of memory accesses performed by the processor. These accesses may be processor instruction fetches or general memory transactions. This IP core improves tamper resistance by avoiding any modification, spoofing or analysis of external data. It comes with optional authentication and handles multi-region management. The IP core is highly configurable with the possibility of area/performance trade-offs.

"We have received many requests from the market to offer a DDR encrypter with very high throughput that not only supports ASICs, but also FPGAs, including the UltraScale+ and Versal from Xilinx". said Sébastien Rabou, CTO at Silex Insight. "The unique architecture enables a high level of flexibility and allows it to be used by microcontroller and multi-core architectures. The features required by a specific application can be taken into account in order to select the most optimal configuration for any FPGA or ASIC technology".

It supports AXI slave/master interfaces, APB port for configuration purpose. It is typically placed between the processor(s) and an external memory controller (DDRx).

For more information, visit: https://www.silexinsight.com/ddrencrypter

Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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