Articles related to Semidynamics
Open Source

Semidynamics Drops its All-In-One AI IP On Us - Press Release

April 11, 2024

Barcelona, Spain – 5 April 2024. Semidynamics, the European RISC-V custom core AI specialist, has announced its ‘All-In-One AI’ IP that is designed for super powerful, next generation AI chips and algorithms such as transformers. Currently, AI chip designers use the approach of integrating separate IP blocks next to the system CPU to handle the ever-increasing demands of AI. Semidynamics has taken a revolutionary approach of a unified solution combining RISC-V, vector, tensor and Gazzillion technology so that AI chips are now easy to program and scale to whatever processing power is required.

Open Source

Semidynamics and Arteris Combine to Push AI and RISC-V to the Beyond - News

November 14, 2023

Campbell, California. Arteris, Inc. and Semidynamics are collaborating to enhance the next generation of electronic components for artificial intelligence (AI), machine learning (ML) and high-performance computing (HPC) applications. The agreement sees the interoperability between Semidynamics' Atrevido and Avispado 64-bit RISC-V processor IP cores and Arteris’ Ncore cache coherent network-on-chip (NoC) system IP.

Open Source

RISC-V Environment and CHI Interconnect for AI and ML Applications - News

October 04, 2023

Barcelona, Spain. Semidynamics and SignatureIP are collaborating to incorporate respected technologies for a completely assessed multi-core RISC-V environment and CHI interconnect for innovations in chip development for AI and ML applications. The solution utilizes SignatureIP’s Coherent NoC, designed to be scalable with the inclusion of a transport layer for chiplet communication and acts as an ordered file system with support for home-node resource group.

Open Source

Semidynamics Released its 4-way Atrevido 423 RISC-V Core - News

July 28, 2023

Barcelona, Spain. Semidynamics released its 64-bit flexible 4-way Atrevido 423 RISC-V core delivering double the instructions than the 2-way, 223 core. More functioning units are utilized increasing the IPC (instructions-per-cycle). The processor core can be utilized in two ways, as a coherent core sharing memory with others via CHI (Coherent Hub Interface) NoC (Network on Chip), or an incoherent core operating independently and uses an AXI interface for communication.


Semidynamics is Delivering 2048b of Computation Per Cycle - News

June 06, 2023

Barcelona, Spain. Semidynamics delivers a fully customizable Vector Unit integrated into 64-bit RISC-V cores able to run up to 2048b of computation per cycle for large data transmissions. The unit follows the RISC-V Vector Specification 1.0 and adds many features to fit user requirements.

Open Source

Speed Through Data with First Ever Fully Customizable RISC-V IP Cores - News

April 17, 2023

Semidynamics released a one of a kind 64-bit RISC-V family of cores boosting the ability to transmit copious amounts of information for high-performance computing (HPC) and AI/ML. The cores are process agnostic and utilize Gazzillion technology that was developed for recommendation systems, a must for data center ML.