Why Your Embedded ADC Does not Perform to the Data Sheet and how to Improve its Performance, Part 1: Why the Performance Doesn?t Match

By Christy She

System Development Engineer

Texas Instruments

September 24, 2018


Why Your Embedded ADC Does not Perform to the Data Sheet and how to Improve its Performance, Part 1: Why the Performance Doesn?t Match

The reason your embedded analog-to-digital converter (ADC) does not perform to the data sheet is because the characterization environment does not match your application.

The reason your embedded analog-to-digital converter (ADC) does not perform to the data sheet is because the characterization environment does not match your application. The difference is the noise (electromagnetic interference) that is not present in the integrated circuit (IC) manufacturer’s clean and controlled characterization environment.

Before you start blaming the characterization engineer, let’s appreciate that an embedded ADC is just one of many peripherals of the microcontroller (MCU). The number of combinations and permutations makes a complete characterization across all use cases impractical. And with the manufacturer only selecting a subset of use cases – typically the better-performing ones – there may be a gap between those use cases and your specific application. In this article series, we’ll provide guidance on how to demystify that gap.

This four-part series introduces the different components that contribute to ADC performance and different techniques that you can incorporate to specifically address noise. The first installment will discuss the different components of the ADC. The second installment will address clock and reference selection. The third and fourth installments will talk about how to improve performance with user configuration and printed circuit board (PCB) layout, with the fourth installment focusing on the benefits of differential inputs for data acquisition.

Why your embedded ADC performance doesn’t match the data sheet

IC manufacturers want to show the best performance possible in the data sheet; thus, they select the configuration that puts their device in the best light. Some IC manufacturers will show a parameter at two different configurations or include a graph that shows how a different configuration will affect performance, but in the absence of either, assume that what you see in the data sheet is best case. Paying careful attention to test conditions is important.

Let’s review a couple of common configuration parameters that affect performance, with some guidelines on how you can take a data sheet with parametric conditions that do not match your use case and still know what performance to expect.

  • Data sheet only has the ADC active, so low noise. To obtain ADC performance numbers, devices are placed in low-power modes and the central processing unit (CPU) is rendered inactive in order to minimize noise. If you have the luxury to limit what is on during ADC measurement, the data-sheet performance can be a good indicator of the level of performance you can reach. However, if the CPU is heavily loaded and other tasks are running at the device, board and system levels, it would be good to bench test the performance early to make sure that the ADC is meeting your needs. The third and fourth installments of this series will discuss PCB considerations for your board in order to maximize performance.
  • Regulator architecture. If you have an option to choose between an internal low dropout regulator (LDO) and a DC/DC converter, the LDO will minimize on-chip noise. If you want to maximize battery life and you select a DC/DC converter, the switching noise may reduce ADC performance and the degree depends on the input signal frequency and is different among different ADC and different switching frequency DC/DC converters.
  • Data sheet only shows ADC performance, not signal-chain performance. MCUs may contain other components such as operational amplifiers and digital-to-analog converters (DACs) that can be used in the signal chain leading to the ADC. When used in the signal path, the noise they cause will degrade the input into the ADC, increasing noise in the ADC output. The data sheet often shows just the ADC performance, the more activity on chip and the higher the frequency, generally the more degradation in ADC performance. The ADC is the last piece of the analog front end but additional post digital filtering can further improve performance. Also, if the ADC samples enough over the Nyquist rate of the input signal, over-sampling can be implemented at system level to improve SNR as out-of-band quantization and thermal noise can be filtered out [1].
  • Configurations (modes). Most ADCs have the configurability to allow you to customize trade-offs such as speed, performance and current. Thus, a single data-sheet value may not cover performance for all possible configurations. ADCs integrated into an MCU often have even more configurability in order to optimize the ADC for power and performance across varied use cases. Here are two examples of performance parameters and how they can be impacted by the configuration.
  1. Current consumption. Current is often the result of multiple factors and varies with the configuration. Reference [2] offers a more detailed list of low-power features and ADC configurability. Some data sheets will have typical curves showing how current varies with different configurations. Figure 1 is from an ADC data sheet, and shows how the power mode (PWRMD = 2 is low-power mode) and single-ended or differential-ended input affect the typical current consumption of an ADC.
Figure 1: Current vs. sample rate over different ADC configurations

(Note: Typical values are listed for guidance and you can characterize across devices with the actual usage configuration for a better representative parametric value. Data-sheet parametric maximum values include process variation so must be used as is.)

  1. Sample rate. Several factors affect the sample rate, including conversion clock frequencies, sample and hold time, and any special modes or features like an integrated window comparator. The device data sheet will list the minimum sample time for a specific source resistance and capacitance, but if the source you are measuring has a larger source resistance, the ADC needs a longer sample time to maximize ADC performance. A minimum sample-time equation for the ADC should be documented by the manufacturer in the data sheet and/or reference manual. Reference [3] shows an example of minimum sample-time equation and example calculation for a specific device.
  • Supply voltage. MCUs have a fairly wide operating range to support many applications, especially battery-powered applications. The wide range does not always match the ADC, which may require a higher minimum supply voltage. If this is a limitation, then you will find the minimum supply voltage for ADC operation in the data sheet, usually a row in an ADC parametric table. Depending on the ADC architecture and design, there may be performance degradation at lower supply voltages, so carefully look at data-sheet test conditions for the supply voltage used. Data sheets show test conditions in different ways, including footnotes, a column in the data sheet and/or a table title. Some data sheets supplement table entries with graphs that show how performance changes over voltage or temperature.

In a battery-powered application, understanding performance over the range of the operational battery voltage is critical to a successful design. If your application needs a lower supply than what the data sheet shows the ADC parametric at, check the performance at the minimum supply of your application to know whether it meets your performance requirements.

When the supply varies, as is the case of a direct battery connection, some parametric values can change across the supply voltages. Power-supply rejection ratio (PSRR) is one measure, but also look for any parameter with units*/Vsupply.

Other parameters that may be affected by the supply variation include gain and offset errors. Keep in mind that the impact of supply variation is dependent on the ADC. Some ADCs may be sub-regulated (with an internal LDO, for instance) to always have the same voltage supply independent of the device supply.

  • Clocks. ADCs within an MCU often have configurable clock sources. Higher clock jitter lowers the signal-to-noise ratio (SNR) for non-DC signals. Internal oscillators usually have the highest jitter, while external clocks have the lowest jitter. The internal oscillator is preferred for lower-current and lower-cost solutions as long as the jitter doesn’t degrade performance lower than what’s required. MCU data sheets do not often specify the jitter of internal clocks. The amount of jitter that can be tolerated is application-dependent. You will need more details to understand how to select the right clock for your application, which we’ll cover in part 2.
  • References. Most MCU ADCs offer an internal reference, or enable the use of an external reference. The external reference offers higher performance, but is an added cost and usually has higher current. Part 2 will go into details to help you select the right reference source for your application.

Regardless of the reference source you choose, if the integrated ADC supports a range for the input reference voltages, then understanding how the reference voltage level affects performance is important. Selecting a lower reference voltage reduces the least significant bit (LSB) size so that the overall (full-scale) range decreases in order to resolve smaller changes in voltage. This reduction in the signal via the reference voltage level affects performance, as shown in Equation 1:

where SIGNAL is the full-scale ADC input less than or equal to the reference voltage.

Figure 2 shows how SNR decreases as the reference voltage decreases. Given the same noise, when the signal is smaller (in the case of a lower reference voltage), the SNR is lower. Thus, to maximize performance, keep in mind the full dynamic range of the ADC; if necessary, pre-condition or amplify the ADC input to use the full ADC dynamic range.

In cases where you cannot use an amplifier, choose the smallest reference voltage level larger than the maximum input signal. For example, if an input signal is 1.9V and voltage references of 2V and 4V are available, amplifying the input by a factor of 2 and using the 4V reference would provide better SNR than measuring the 1.9V directly with a 2V reference. For instance, if the ADC input signal is 0V to 1.9V, a 2V reference is better than a 2.5V reference.


This first installment highlighted different configurations and components that impact ADC performance. Configurations will vary from device to device, and you need to understand those configurations when making a component decision. Besides configurations, however, there are components fundamental to ADCs to explore in more detail, which are relevant to all MCUs. In part 2, we’ll explore the ADC clock and reference options.

This is part one of a series, to read part two, click here.


  1. Precision ADC with 16-Bit Performance,” Texas Instruments application report SLAA821, January 2018.
  2. She, Christy. “Top 12 ways to achieve low power using the features of an integrated ADC,” Texas Instruments E2E™ Community blog post, June 6, 2016.
  3. MSP432P4xx SimpleLink™ Microcontrollers Technical Reference Manual,” Texas Instruments literature number SLAU356H, December 2017. Section, Sample Timing Considerations, page 848.

Specialties: analog sytem development for mixed signal designs

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