Imperas’ RV32/64K Crypto Architectural Validation Test Suites Now Included in RISC-V Verification Ecosystem

By Chad Cox

Production Editor

Embedded Computing Design

March 09, 2021

News

Imperas’ RV32/64K Crypto Architectural Validation Test Suites Now Included in RISC-V Verification Ecosystem
(Image courtesy of Imperas)

Imperas Software released its latest update to the RISC-V architectural validation test suites for the RV32/64K Crypto (scalar) extension.

The released tests support the RISC-V ISA Crypto specification proposed as the "K" extension, current draft spec 0.8.1, and will be updated as the spec is publicly reviewed and ratified.

Imperas updated the free RISC-V Open Virtual Platform Simulator as a reference Instruction Set Simulator (ISS) for users and developers of RISC-V processor cores, with the new Crypto extensions, which is available on OVPworld.

The riscvOVPsimPlus solution is an entry ramp for development and verification and includes a proprietary freeware license from Imperas, which covers free commercial use as well as academic use.

For more information, visit imperas.com.

Chad Cox. Production Editor, Embedded Computing Design, has responsibilities that include handling the news cycle, newsletters, social media, and advertising. Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature.

More from Chad