Unlocking New Horizons in AI and IoT with AMD’s Versal Premium Gen 2 FPGA

By Chad Cox

Production Editor

Embedded Computing Design

November 18, 2024

News

Unlocking New Horizons in AI and IoT with AMD’s Versal Premium Gen 2 FPGA
Image Credit: AMD

As the need for faster, more efficient data processing increases, Field Programmable Gate Arrays (FPGAs) are a fundamental technology bridging the gap between traditional hardware accelerators and cutting-edge applications like Artificial Intelligence (AI). They are becoming a critical building block for innovations from edge computing to cloud infrastructure.

With the need recognized, AMD recently introduced the Versal Premium Gen 2, its newest Field Programmable Gate Array (FPGA)-based solution allowing faster throughput between processors and accelerators. In data-intensive applications such as Artificial Intelligence (AI) and the Internet of Things (IoT)/sensors, FPGAs offer several advantages that enhance performance, scalability, and flexibility.

According to AMD, the platform is the first FPGA of its kind to integrate the Compute Express Link (CXL) 3.1 interconnect standard. Versal supports PCIe Gen6 for enhanced data transfer and LPDDR5X memory for extended bandwidth and efficacy. Data transfer speeds reach up to 8533 megabytes per second (MB/s).

“Our latest addition to the Versal Gen 2 portfolio helps customers improve overall system throughput and utilization of memory resources to achieve the highest performance and unlock insights for their most demanding applications from the cloud to the edge,” said Salil Raje, SVP and general manager of the adaptive and embedded computing Group at AMD.

With its ability to address the increasing demands of edge-to-cloud applications, the Versal Premium Gen 2 FPGA underlines the critical role of FPGAs in enabling innovation, driving efficiency, and unlocking the full potential of modern data-driven technologies.

For more information, visit amd.com/en/products/adaptive-socs-and-fpgas/versal/gen2/premium-series.

Chad Cox is the Production Editor at Embedded Computing Design. His responsibilities are centered around content creation, writing and editing, and article research and development. Chad covers industry news and events and is known to interact with various industrial leaders via on-premise visits and online interviews. He is responsible for the digital footprint and dissemination of news via social media posts, advertising creation and the production of newsletters including the Embedded Computing Design’s Daily.

He is well versed in many facets of industrial computing including Edge AI, IoT, Processing, Security, Open Source, and more.

Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature and holds a master’s in education.

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