FLC memory architecture saving dollars and space
May 14, 2015
I was recently introduced to Marvell's Final-Level Cache (FLC) architecture. It actually solves a problem I wasn't even aware existed. Imagine that. I...
I was recently introduced to Marvell’s Final-Level Cache (FLC) architecture. It actually solves a problem I wasn’t even aware existed. Imagine that. It turns out that, with current operating systems, only a small percentage of application code loaded in main memory is active at any given time. Even though most of the processes are idle, they’re taking up space in the main memory (potentially expensive DRAM).
Because of how the OSs are generally architected, the DRAM doesn’t know when to load or unload snippets of code in its applications. According to Marvell, its FLC architecture solves this issue by redefining the main memory hierarchy, automatically loading pieces of code as needed and purging unneeded code, freeing up space for other applications.
The result is that you can reduce the amount of DRAM needed and replace it with less expensive solid-state memory (a conventional SSD).
There are a number of other benefits that can be recognized. For example, the smaller amount of FLC DRAM that’s required results in less power consumption; the FLC DRAM can be placed next to the processor, potentially running faster.
Clearly, this technology isn’t for all applications, but it’s obvious where it makes sense. This would include smartphones, tablets, laptops, servers, wearables, IoT devices, and storage systems.