Micron's 1-Beta Node DRAM Technology for Low-Power, High-Efficiency Smartphone and IoT Applications

By Tiera Oliver

Associate Editor

Embedded Computing Design

November 03, 2022

Story

Micron's 1-Beta Node DRAM Technology for Low-Power, High-Efficiency Smartphone and IoT Applications

As electronic devices are continuously shrinking in order to keep up with the demands and advancements of next-generation technologies, semiconductor companies must consistently keep up with those requirements. Storage and memory technologies such as DRAM are embedded in almost every electronic device active on the market today, and they are no exception to the laws of physics in the semiconductor space.

With the reduction of process nodes in devices each year, the storage and memory markets have begun to implement new technologies to meet higher memory capacities within a smaller footprint, with the goal of achieving a lower cost per bit of data.

The DRAM scaling process allows devices to keep pace with the faster speeds and increased memory per square millimeter within a semiconductor area. The process requires the minimization of circuits so that billions of memory cells can fit on a chip around the size of a penny. One company at the forefront of this push is Micron Technology with their recent adoption of lithography and nanomanufacturing technologies that have enabled them to achieve a 1β node DRAM.

Micron Technology’s 1β (1-beta) DRAM technology is in the mass production phase as an advanced DRAM technology node. The 1β builds upon the company’s previous 1α (1-alpha) and is designed to provide low power and low latency in a high-performance DRAM for real-time, safety-critical applications with a 15% improvement in power efficiency, 35% increase in bit density, and up to 16Gb per die capacity.

1β employs a next-generation process technology with low-power double data rate 5X (LPDDR5X) mobile memory and increased speeds of 8.5 gigabits (Gb) per second.

With qualification samples now being shipped to a limited number of smartphone manufacturers and chipset partners, the 1-beta DRAM will benefit mobile devices such as smartphones with quicker and more reliable download speeds, as well as other data-heavy 5G and AI applications.

The company’s LPDDR5X utilizes the 1β technology and is designed to improve smartphone use cases such as camera launch, night mode, portrait mode and pro mode photography, shake-free, high-resolution 4K video recording, and in-phone video editing.

“The launch of our 1-beta DRAM signals yet another leap forward for memory innovation, brought to life by our proprietary multi-patterning lithography in combination with leading-edge process technology and advanced materials capabilities,” said Scott DeBoer, executive vice president of technology and products at Micron. “In delivering the world’s most advanced DRAM with more bits per memory wafer than ever before, this node lays the foundation to usher in a new generation of intelligent, data-rich and energy-efficient technologies from the edge to the cloud.” 

Some companies within the semiconductor industry have implemented technologies such as extreme ultraviolet light to aid them in the shrinking of devices, but Micron Technology’s adoption of nanomanufacturing and lithography has allowed them to work in their multi-patterning and immersion techniques to integrate small features with high precision, which is ideal for smartphones and IoT devices.

Micron has received investments and will be mass producing the DRAM on 1β at their Hiroshima plant. But 1β has a larger effect on the hopeful future of sustainability than just for the company itself. Its ability to achieve a lower power per bit consumption could help with carbon emissions and the over-exertion of energy from today’s modern devices.

According to the company, the low power per bit consumption of 1β process technology delivers the most power-efficient memory technology on the market for smartphones yet, which could lead to ease of development and deployment for smartphone manufacturers, as well as improved battery life efficiency.

Additionally, the 1β-based LPDDR5X employs the new JEDEC enhanced dynamic voltage and frequency scaling extensions core (eDVFSC) techniques which could aid in power savings and power efficiency with doubled frequency up to 3,200 megabits per second with the addition of eDVFSC.

Today’s memory devices have no choice but to meet the demands of the industry, the users of these devices, and global sustainability goals that all require energy-efficient and high-bandwidth memory, as well as increased processing speeds.

For more information, visit www.micron.com.

Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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