AMD Announces World’s Largest FPGA-Based Adaptive SoC for Emulation and Prototyping

By Tiera Oliver

Associate Editor

Embedded Computing Design

June 27, 2023


AMD Announces World’s Largest FPGA-Based Adaptive SoC for Emulation and Prototyping

SANTA CLARA, California – AMD announced the AMD Versal™ Premium VP1902 adaptive system-on-chip (SoC), an emulation-class, chiplet-based device designed to improve the efficiency when verifying complex semiconductor designs.

Per the company, the VP1902 adaptive SoC is the world’s largest 1 adaptive SoC offering 2X 2 the capacity over the prior generation, enabling the transformation and validation of application-specific integrated circuits (ASICs) and SoC designs.

“Delivering foundational compute technology to enable our customers is a top priority. In emulation and prototyping, that means delivering the highest capacity and performance possible,” said Kirk Saban, corporate vice president, Product, Software, & Solutions Marketing, Adaptive and Embedded Computing Group, AMD. “Chip designers can confidently emulate and prototype next-generation products using our VP1902 adaptive SoC, accelerating tomorrow’s innovations in AI, autonomous vehicles, Industry 5.0 and other emerging technologies.”

Also, according to the company, the VP1902 delivers 18.5M logic cells for 2X 2 higher programmable logic density and 2X 3 aggregate I/O bandwidth compared to the previous generation Virtex™ UltraScale+™ VU19P FPGA. The VP1902 adaptive SoC also leverages the Versal architecture, including the programmable network-on-chip, to provide up to 8X 4 faster debugging compared to the prior generation VU19P FPGA.

The AMD Vivado™ ML design suite is a comprehensive development platform that enables the design, debug, and validation of next-generation applications and technologies, with new features that support development on the VP1902 adaptive SoC such as automated design closure assistance, interactive design tuning, remote multi-user real-time debugging, and enhanced back-end compilation, which allows end users to iterate IC designs efficiently.

The AMD Versal Premium VP1902 adaptive SoC will begin sampling in Q3 to early access customers with production expected in the first half of 2024.

For more information, visit:

1 Based on AMD internal analysis in May 2023 with a 6-input LUT count to compare the Versal Premium VP1902 device versus the Intel Stratix 10 GX 10M FPGA. (VER-002)

2 Based on AMD internal analysis in May 2023, comparing the number of system logic cells of the Versal Premium VP1902 device versus the Virtex UltraScale+ VU19P device. (VER-001)

3 Based on AMD Labs testing using an A6865 package to simulate the XPIO data rate performance of an AMD Versal Premium VP1902 device versus the published data rate of an AMD Virtex UltraScale+ VU19P FPGA. Actual results will vary. (VER-003)

4 Based on AMD internal analysis in May 2023, comparing the readback/writeback performance of an AMD Versal adaptive SoC CFI interface versus an AMD Virtex UltraScale+ FPGA ICAP interface. Actual performance will vary. (VER-004)

Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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