MIPS and Imperas Collaborate on Verification Tools for RISC-V Processors

Chad Cox

December 13, 2022

How 3D Printing Can Make Your Prototypes Easier

Taryn Engmark

October 3, 2022

Fueling the Next Phase of Semiconductor Innovation Through the Cloud

Vikram Bhatia 

August 9, 2022

Siemens’ Calibre Platform Expands Early Design Verification Solutions

Tiera Oliver

August 2, 2022

Keysight Launches New Design and Simulation Software for Radio Frequency and Microwave Designers

Taryn Engmark

July 5, 2022

u-blox Releases Platform to Test and Validate IoT Solutions

Taryn Engmark

June 2, 2022

Codasip Adopts Siemens’ OneSpin Tools for Formal Verification

Tiera Oliver

June 1, 2022

Synopsys Launches the Era of Smarter SoC Design with ML-Driven Big Data Analytics Technology

Tiera Oliver

June 1, 2022

Synopsys and Microsoft Launch First Broad-Scale EDA Cloud SaaS Solution

Tiera Oliver

April 4, 2022

Dolphin Design chooses DEFACTO's SoC Compiler 9.0: a turnkey methodology to reduce project costs and increase team efficiency

DOLPHIN DESIGN

March 7, 2022

EMA Design Automation Expands Operations in Central Europe

Taryn Engmark

January 12, 2022

Simplifying Design Verification for Increasingly Custom RISC-V Processors

Brandon Lewis , Saumitra Jagdale

December 10, 2021

SiFive Essential 6-Series, 21G3 Release Add Mid-Range Performance & Features to Leading RISC-V IP Portfolio

Brandon Lewis

December 10, 2021

Siemens Extends Support of Multiple IC Design Solutions for Samsung Foundry’s Latest Process Technologies

Tiera Oliver

November 29, 2021

Real-time Ray Tracing Technology: A Game-Changer for Mobile Graphics

Kristof Beets

November 17, 2021

“Total Solutions for IoT” Virtual Dev Platform Cuts Lifecycles by up to Two Years

Taryn Engmark

October 21, 2021

Embedded Executive: Jeff DiCorpo, SVP Business Development, efabless

Rich Nass

July 7, 2021

Power Modeling and Estimation in Early System Design, Part 1

Deepak Shankar

June 28, 2021

Product of the Week: Cadence Spectre FX FastSPICE Simulator

Embedded Computing Design Staff

June 22, 2021

IBM's 2 nm Transistor Breakthrough Puts Chip Design Under the Microscope

Anupurba Mukherjee

June 18, 2021

Sondrel Reference IP Enables HPC SoCs While Reducing Cost and Design Time by 30 Percent

Brandon Lewis

May 18, 2021

Sondrel has added the SFA 300 reference design to its semi-custom SoC IP portfolio. Consisting of four-CPU clusters featuring 4 TOPS per channel of AI processing and 400 GOPS per channel of DSP performance, clusters can be daisy chained via the PCIe interface to create HPC solutions. The IP reuse solution enables the creation of differentiated AI, 8K video, blockchain, data analytics, and other high-performance data processing solutions by integrating customer-specific IP such that design time and cost can be reduced by up to 30 percent.