ADC Decimation: Addressing High Data-Throughput Challenges

By Chase Wood

Applications Engineer, high-speed data converters

Texas Instruments

February 05, 2024


ADC Decimation: Addressing High Data-Throughput Challenges

As data converters push the boundaries of sampling rates and available bandwidth, system designers face challenges in ensuring high-speed (>10Gbps) signal integrity. The evolving landscape of analog-to-digital converters (ADCs) leans toward increased digitalization, leading to a reduction in the demands on digital signal processors (DSPs) or field-programmable gate array (FPGA) resources.

This article is the first monthly installment of a three-part series covering the subject of decimation in radio-frequency (RF) sampling ADCs from Texas Instruments.

In an ADC, employing a digital downconverter (DDC) alongside digital decimation filters reduces the output data rate. Decimation proves particularly valuable in scenarios where only a specific portion of the Nyquist zone is applicable.

Typical approach to RF sampling

In recent years, direct RF sampling data converters have sampled at speeds in excess of 10GSPS, meaning that the Nyquist frequency and instantaneous bandwidth are both increasing, since they are directly related to the sample rate. With more instantaneous bandwidth, you have the option to use more of a Nyquist zone for data transmission, meaning more throughput. But there is a limit.

While in theory it is possible to demodulate an upper Nyquist zone into baseband and then simply filter at the Nyquist zone, this would only be useful if the entire Nyquist zone contained signals of interest and the converter had a very large input range and high resolution. As signal bandwidth increases, the amplitude of each frequency component of the signal must decrease in order to avoid over-ranging the converter. Frequencies will overlap in the time domain, causing signals in excess of the supported ADC input level. Implementing many lower bandwidth signals (with adequate spacing and cushion between the bands) and using dedicated analog mixers at each band’s center frequency (fc) is the typical solution to avoid this problem. Scalability quickly becomes an issue, however, as each band of signals requires a dedicated analog mixer and data-converter channel.

Pairing a DDC stage with decimation filters to first demodulate the RF signal and remove out-of-band noise, spurs and harmonics leaves just the signals of interest at a reduced data bandwidth to pass to any downstream processor. For instance, if a converter has 500MHz of usable bandwidth but you only care about a 15MHz band of signals, the converter’s bandwidth utilization is only 3%. If you were to implement a decimation-based solution, the converter’s overall useful bandwidth would drop by a decimation factor (M), while the 15MHz of input signal remained at 15MHz. If you chose to perform decimation by 32, the converter’s utilization would increase significantly – up to 96%. In layman’s terms, instead of taking a sip from a firehose, decimation allows you to take a sip from that firehose using a straw – and dump the extra water onto the grass.

Converter decimation at a high level

Decimation in its simplest form is the process of reducing a digital signal’s data rate to transmit a reduced portion of the data to a signal processor of choice, such as an FPGA or DSP. In recent years, integrating this function into RF sampling data converters helped system designers by reducing the downstream processing workload, enabling the selection of lower-cost FPGAs or DSPs (requiring less computational power), while also improving a system’s data processing efficiency.

DownFigure 1: The two stages of downconversion in the time domainconversion itself is a process comprising two steps, as shown in Figure 1. First, the sampled data must pass through an anti-aliasing filter. The digital low-pass filter acts to limit the bandwidth to the first Nyquist zone, preventing the effects of aliasing, often referred to as images. Aliasing occurs as a result of tones in higher Nyquist zones that fold back into the first Nyquist zone appearing as spurs to the ADC (and thus to any subsequent data processor).

After the filter stage, the data passes into a decimator, whose function is to perform downsampling on the digital data stream by passing a single ADC code every M number of ADC clock cycles, resulting in a reduced output data rate of 1/M. Each ADC code inherently contains information from the previous M-1 samples as a result of the finite impulse response (FIR) low-pass filter.

What is a decimation filter?

The ADC samples at a full data rate and downconverts the data based on an intermediate frequency generated by a numerically controlled oscillator (NCO) and a digital mixing stage. After downconversion, the data has aliasing and images at every multiple of the NCO frequency, which is where the digital decimation filters come into play. These decimation filters are created using digital FIR filters and comprise a passband, many transition bands and many alias bands, as shown in Figure 2.

Tones within the passband are unaffected by the decimation filter and as a result are not attenuated. Input signals in the transition bands experience some level of attenuation, which may be any level of attenuation from just a few decibels all the way down to the attenuation specification of the ADC. Tones within the alias bands fall outside the decimation filter and will be attenuated heavily. This attenuation level will be listed in the ADC data sheet as the decimation filter stop-band rejection level.

Figure 2: Decimation filter band regions (normalized)The transition band is also labeled at the alias frequency of higher Nyquist zones, indicating where second-order harmonic distortion (HD2), third-order harmonic distortion (HD3) or any higher harmonic may appear; however, these harmonics are attenuated at the alias band rate. Additionally, if operating near the useful band limitations for any decimation mode, it’s likely that the signals are heavily attenuated, more than preferred. Proper frequency planning will ensure that the input frequency lands within the pass band of the ADC in any specific decimation mode.


By addressing challenges linked to increasing bandwidth needs, integrating digital downconverters and decimation filters emerges as a viable solution for system designers. Having laid the groundwork on decimation and its advantages, in part 2 I will explore the real-world applications of decimation in RF sampling ADCs.

Experienced Applications Engineer in the High Speed Data Converters group at Texas Instruments, with a Bachelor of Science in Electrical Engineering from The University of Texas at Dallas.

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