RISC-V Foundation
PMB 57274
San Francisco, CA 94104-540 [email protected]
+1 (415) 694-6700
https://riscv.org/
Solid Sands Explains Qualifying C and C++ Libraries for Critical Systems - News
December 14, 2022RISC-V Summit, San Jose. Solid Sands will be announcing it has been invited to the RISC-V community as a strategic member at the RISC-V Summit. While attending the show, industry insiders will learn Solid Sands expertise on how to qualify C and C++ standard libraries for safety-critical applications.
Microchip Showcases PolarFire Devices for RISC-V and Space Compute Solutions - News
December 14, 2022RISC-V Summit, San Jose. Microchip worked with NASA and the aerospace and defense industry to develop a RISC-V-based High-Performance Spaceflight Computing (HPSC) processor that is being presented at the RISC-V Summit. Microchip is also promoting its PolarFire 2 FPGA silicon platform and RISC-V-based processor subsystem with a software suite roadmap at the Summit.
Ashling Unveils its Vitra-XS at RISC-V Summit - News
December 14, 2022RISC-V Summit, San Jose. Ashling is showcasing its Vitra-XS, a debug and trace probe for integrated design with support for RISC-V and Arm platforms. Ashling developed the Vitra-XS to collaborate with Ashling’s RiscFree Eclipse based IDE & Debugger utilizing USB 3.0, 38-way Mictor target connector, 512 MB of on-board trace storage, RISC-V debug & trace standards E-Trace and N-Trace, and Arm CoreSight debug & trace standards SWD, DAP, ETM, PTM, STM, and CTI.
Imperas and Imagination Partner to Unleash a Virtual Platform Model Utilizing RISC-V - News
December 13, 2022RISC-V Summit, San Jose. Imperas Software Ltd., announced that Imagination Technologies will utilize the Imperas model IMG RTXM-2200, from Imagination’s RISC-V Catapult family, as a solution for software design in virtual platforms and EDA environments. The IMG RTXM-2200 is a scalable real time deterministic 32 bit embedded CPU developed for commercially available components.
Siemens Brings Commercially Accepted Linux Support for RISC-V Architecture - News
December 13, 2022RISC-V Summit, San Jose. Siemens Digital Industries Software announced that its security and cloud enabled Sokol Flex OS software, centered around the open-source Yocto Project industry standard, supports RISC-V embedded advancement with its customizable Linux platforms for the RISC-V architecture. “Siemens continues to show leadership within the RISC-V ecosystem with the launch of Sokol Flex OS for RISC-V,” said Krishnakumar Ramamoorthi, senior product marketing manager of Microchip Technology's FPGA business unit.
MIPS and Imperas Collaborate on Verification Tools for RISC-V Processors - News
December 13, 2022RISC-V Summit, San Jose. MIPS has designated Imperas to deliver flexible framework RISC-V processor verification tools to simplistically adapt from issue recognition and debug resolution in a testbench ecosystem consistent with the SystemVerilog EDA tools. The provided tools support the open standard RVVI (RISC-V Verification Interface) with the ability to communicate with a processor.
Codasip Will Discuss its SecuRISC5 Initiative at the RISC-V Summit - News
December 12, 2022RISC-V Summit, San Jose. Codasip announced its SecuRISC5 for reliable custom compute that utilizes reference designs merging Codasip IP and third-party technology. The recently launched Codasip Labs1 will recognize openings where SecuRISC5 will be attentive, a hub, and a coordinator of pan-industry collaboration.