GOWIN Semiconductor Announces New Arora V 22nm FPGA Family

By Tiera Oliver

Associate Editor

Embedded Computing Design

October 07, 2022


GOWIN Semiconductor Announces New Arora V 22nm FPGA Family

San Jose, California and Guangzhou, China -- GOWIN Semiconductor Corporation released its new generation Arora V high performance FPGA family featuring advanced 22nm SRAM technology.

The family provides high-speed SerDes interfaces from 270Mbps to 12.5Gbps, PCIe 2.1 hard core with support for PCIe x1, x2, x8 modes, a MIPI hard core single lane module at up to 2.5Gbps, and DDR3 interfacing up to 1333 Mbps. The fully controllable high speed SerDes supports high data rate applications like communication, video aggregation, and AI computing acceleration.

“New architecture DSP modules, Block RAM modules supporting ECC error correction, high performance multiple voltage GPIO, and high accuracy clock architecture are all featured in Arora V,” said TP Wang, Chief Technology Officer at GOWIN Semiconductor. “We believe that these new generation Arora V products will provide our customers with higher performance and lower power consumption, while the internally optimized modules will provide customers with more flexible configurations and a better user experience."

The GW5AT-138FC676 family device enables 138K LUT logic resources, 6.4MB block RAM, 1.1MB distributed SRAM, advanced DSP blocks, and integrated ADC, with future family devices including 25K (non-Serdes) and 60K LUT devices.

Arora V integrates hard-core modules and soft IP solutions for interfaces such as PCIe 2.1, MIPI DSI, DDR3, SGMII, XAUI, Gbe, SDI, and USB3.1.

“These free of charge IP solutions will effectively shorten customer’s time to market delivering additional value,” said Mike Furnival, Vice President of International Sales, GOWIN Semiconductor. “We genuinely believe the launch of Arora V will greatly expand the adoption of GOWIN based solutions in the mid to high density space resulting in further expansion for the development of the global FPGA industry.”

For more information, visit www.gowinsemi.com

Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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