DDR4 memory on prototypes and production PCBs can be quickly tested with ASSET InterTech's ScanWorks

By Robert Russell


December 05, 2018


DDR4 memory on prototypes and production PCBs can be quickly tested with ASSET InterTech's ScanWorks

Engineers designing with Double Data Rate 4 (DDR4) memory devices can quickly deploy tests for shorts and opens on control, address and data lines with the boundary scan test (BST) tools of ASSET...

DDR4 can be tested with the BST tools of ASSET\'s ScanWorks
DDR4 can be tested with the BST tools of ASSET's ScanWorks


- Without probes or bed-of-nails fixtures, ScanWorks Memory Access Verify (MAV) and Component action for DDR4’s Connectivity Test (CT) can pinpoint shorts and opens on DDR4 device interconnects


- Downloadable DDR4 device models enable fast deployment of MAV test actions


- For even greater fault coverage, processor-based tests provide the added value of at-speed functional testing with structural diagnostics on DDR4 lines

Richardson, TX (December 5, 2018) – Engineers designing with Double Data Rate 4 (DDR4) memory devices can quickly deploy tests for shorts and opens on control, address and data lines with the boundary scan test (BST) tools of ASSET InterTech’s ScanWorks platform for fast test and programming. Downloadable models of DDR4 memory devices can be rapidly integrated into a ScanWorks Memory Access Verify (MAV) test action, which can then test the access to on-board DDR4 memory. With the ScanWorks MAV test action, shorts and opens testing of DDR4 memory devices can begin with board prototypes in development and continue on to production units in manufacturing.

DDR4, the latest generation of this type of fast random-access memory, doubles the top-end data transfer speed of the former generation, DDR3, and consumes less power. DDR4 devices can perform 4,266 million transfers per second (MT/s) on a 1.2 V power line. DDR3’s top transfer speed is 2,133 MT/s with a 1.65 V supply.

“We are starting to see more DDR4 memory show up in designs based on system-on-a-chip (SoC) devices, such as the Zynq UltraScale+,” said Michael Johnson, Product Manager for ScanWorks Boundary-Scan Test. “Our online library of DDR4 device models really simplifies the process of developing a ScanWorks MAV action for testing connectivity to these devices.”

ScanWorks actually supports two means of testing DDR4 devices. The MAV action facilitates DDR4 interconnect testing by accessing the memory array through low-speed emulation of normal read and write commands. As such, this test mode can be employed without designing the circuit board to meet any specific design-for-test (DFT) considerations. In addition, ScanWorks also supports a test mode that is built into DDR4 devices, Connectivity Test (CT). When activated, CT tests for shorts and opens by defining the response of chip output pins as a combinatorial function of stimulus at input pins. As such, CT has faster test run times and offers better coverage and more granular diagnostics of faults, but implementing it presupposes that particular DFT measures had been followed when components were selected and the board was designed. When CT can be employed, ScanWorks DDR4 device models may be downloaded for use with the ScanWorks Component action.

CT and MAV are excellent means of providing fault coverage around DDR4 memory devices, however, these tests do not operate the DDR4 memory devices in their normal, at-speed functional mode. To meet this need, the ScanWorks Processor-based Functional Test tool for DDR4 (PFTDDR) provides at-speed, functional test with structural diagnostics of DDR4 memory devices. For a comprehensive test suite, PFTDDR can be run after MAV or CT tests. PFTDDR differs from all other functional test applications in that it does not require a functioning operating system in order to test the integrity and functionality of the DDR memory, saving valuable time on the production line. PFTDDR includes nine robust memory tests to exercise DDR4 at-speed and under loaded conditions.

The non-intrusive nature of ScanWorks testing is well suited to many systems with DDR4 memory devices, since they often involve densely populated circuit boards with high-speed chip-to-chip interconnects. For this type of circuit board, intrusive test technologies based on mechanical probes or bed-of-nails fixtures require physical access points, which can introduce signaling anomalies that compromise the integrity or reliability of memory function and thus invalidate certain test results. The combination of BST and PFTDDR supports robust test coverage and high test quality throughout the entire life-cycle of the product.



ScanWorks with the MAV and Component test actions capable of testing DDR4 memory device interconnects, as well as the PFTDDR configuration tools for DDR, is available now from ASSET InterTech and its distributors. For more product information, visit www.asset-intertech.com/products/boundary-scan-[...] or download a getting-started guide at



About ASSET InterTech

ASSET InterTech (www.asset-intertech.com) is a leading supplier of tools to debug, validate and test software and hardware. The company’s SourcePoint software debug and trace platform and the ScanWorks platform for fast test and programming work in tandem to give engineers real insight from code to silicon. SourcePoint is a best-in-class, powerful debugger that includes advanced trace tools to gather data from code and quickly debug complex embedded software systems. ScanWorks includes fast test and programming tools that accelerate the development and production of circuit boards. Together, SourcePoint and ScanWorks empower engineers with tools and technology for the entire life-cycle of a system, beginning with development, through production and into field service. ASSET InterTech is located at 2201 North Central Expressway, Suite 105, Richardson, TX 75080, or call 888-694-6250.





ASSET, ScanWorks and the ScanWorks logo are registered trademarks, and SourcePoint is a trademark of ASSET InterTech, Inc. All other trade and service marks are the properties of their respective owners.


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