IAR Systems Supports Latest SiFive Automotive Solutions with Functional Safety Certified Development Tools for RISC-V
October 17, 2022
Uppsala, Sweden –IAR Systems® announced continued support for SiFive’s RISC-V Automotive CPU IP: The IAR Embedded Workbench™ for RISC-V which is aimed at the most recent SiFive Automotive E6-A and S7-A product series and addresses automotive application needs such as infotainment, connectivity, and ADAS, while also incorporating the single instruction set architecture (ISA) utilized by RISC-V to increase code portability and reduce cost and time-to-market.
The SiFive Automotive processor families provide various integrity levels like ASIL B, ASIL D, or mixed criticalities with split-lock, in line with ISO26262. The E6 series was recently announced for real-time 32-bit applications such as system control, hardware security modules (HSMs) and safety islands, and standalone in microcontrollers. The new S7-A is a 64-bit, high-performance real-time core for modern SoCs with advanced safety islands providing low latency interrupt support and the same 64-bit memory space visibility as the main application CPUs.
IAR Embedded Workbench for RISC-V is a development toolchain including the IAR C/C++ Compiler™ and a comprehensive debugger. The functional safety edition of IAR Embedded Workbench for RISC-V is complaint to TÜV SÜD with functional safety standards, such as ISO 26262 and IEC 61508. The integrated C-STAT® tool for static code analysis establishes code quality for automotive applications and aligns with MISRA C:2012, MISRA C++:2008, and MISRA C:2004 industry standards.
Customers using IAR Embedded Workbench for RISC-V have support from IAR Systems’ for the sold version for the duration of the support contract, validated service packs, and regular reports of known deviations and problems.
For more information visit www.iar.com/safety, or access the new on-demand webinar “Mastering design safety for achieving ISO 26262 certification”.