Winbond & Infineon Technologies Collaborate to Double Bandwidth for IoT Applications with HYPERRAM 3.0

By Tiera Oliver

Associate Editor

Embedded Computing Design

April 19, 2022


Winbond & Infineon Technologies Collaborate to Double Bandwidth for IoT Applications with HYPERRAM 3.0

Winbond Electronics Corporation, together with Infineon Technologies, has announced the expansion of their HYPERRAM product collaboration with the new higher bandwidth HYPERRAM 3.0.  

The HYPERRAM product range offers compact alternatives to traditional pseudo-SRAM and is well-suited to low power, space-constrained IoT applications that require an off-chip external RAM. HYPERRAM 3.0 operates at a maximum frequency of 200MHz with a 1.8V operation voltage, which is the same as both HYPERRAM 2.0 and OCTAL xSPI RAM, but with an increased data-transfer rate of 800MBps – double the rate that was previously available. The new generation HYPERRAM operates via an expanded IO HyperBus interface with 22 pins.

"Low pin count, low power consumption and easy control are three key features of HYPERRAM that help it significantly improve the performance of IoT end devices," says Winbond. "HYPERRAM™ significantly simplifies the PCB layout design, extends mobile devices' battery life, and works with a smaller processer via a lower pin count while increasing throughput compared to low-power DRAM, SDRAM, and CRAM/PSRAM," Winbond added.

The HYPERRAM family is ideal for low-power IoT applications, such as wearables, instrument clusters in automotive applications, infotainment and telematics systems, industrial machine vision, HMI displays, and communication modules. HYPERRAM 3.0 is the new generation able to operate under the same command/address signal and similar data bus format with enhanced bandwidth and the same standby power with little pin change. The first member of the HYPERRAM 3.0 family will be a 256Mb device in a KGD, WLCSP Package, which can be implemented at the component level, module level, or PCB level based on the end product type.

HYPERRAM is a high-speed, low-pin-count, low-power pseudo-SRAM for high-performance embedded systems requiring expansion memory for scratchpad or buffering purposes. Introduced by Infineon (then Cypress) in 2015, HYPERRAM now enjoys mature and broad ecosystem support from leading MCU, MPU, and FPGA chipset partners and customers. Its low-pin count architecture makes HYPERRAM suitable for power and board space-constrained applications requiring off-chip external RAM. Optimised HyperBus memory controllers are available from multiple third-party IP vendors.

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Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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