MEDIA ALERT: OneSpin Solutions' Comprehensive Formal Verification Portfolio and Expertise to be Featured at Design Automation Conference

June 21, 2018

Press Release

MEDIA ALERT: OneSpin Solutions' Comprehensive Formal Verification Portfolio and Expertise to be Featured at Design Automation Conference

Demos, Presentations Showcase OneSpin's Advanced Formal Verification Solutions

WHO: OneSpin® Solutions, provider of innovative formal verification solutions for highly reliable, digital integrated circuits (ICs)

WHAT: Will demonstrate its comprehensive formal verification solutions at Design Automation Conference (DAC), including the recently announced OneSpin 360 equivalence checking (EC)-field programmable gate array (FPGA)™ Tool Qualification Kit to support the DO-254 standard.

WHEN: Monday, June 25, through Wednesday, June 27, from 10 a.m. until 6 p.m.

WHERE: Moscone Center West in San Francisco. OneSpin’s Exhibit Booth (#2611) will be located on the second floor.

OneSpin’s formal verification expertise will be on display during DAC technical sessions. John Hallman, program manager of the ATG SCC Division at MacAulay-Brown, and Muhammad Haque Khan, OneSpin’s product specialist synthesis verification, will present “FPGA Bitstream-to-RTL Verification: A Case Study on an IP Module for Aerospace Applications.” The presentation, session 35.3 in the “New Challenges for IP and VIP to Support Emerging Application or Algorithm” IP Track, will be held Tuesday from 3:30 p.m. through 5 p.m. in room 2008.

Sanjay Pillay, CEO of Austemper Design Systems, and Jörg Grosse, OneSpin’s product manager functional safety, will present a 30-minute talk, “Safety-Critical ISO 26262 Hardware Development,” in the OneSpin booth at 3 p.m. Wednesday. An open question and answer session will follow the presentation.

OneSpin Board Director Jim Hogan, managing partner of Vista Ventures, will moderate a DAC Pavilion panel titled, “Can We Use Blockchain to Secure Everything? Should We?” Tuesday from 2:15 p.m. until 2:45 p.m.

The second annual “Verified” party, a celebration of the verification ecosystem, will be held Monday at the Golden Gate Tap Room, second floor, 449 Powell Street in San Francisco from 8 p.m. until midnight. OneSpin organized the party with support from co-hosts Agnisys, AMIQ EDA, Austemper Design Systems, Avery Design Systems, Blue Pearl Software, Breker Verification Systems, Concept Engineering, Dassault Systemes, EDACafe, Electronic System Design Alliance, Metrics, MunEDA, Semifore and Verific Design Automation. Although Verified is invitation-only, a limited number of tickets is available from OneSpin or its co-hosts:

OneSpin also will sponsor this year’s Heart of Technology HOT 55 party, in conjunction with the DAC opening reception, Sunday from 6 p.m. until 10:30 p.m. on Moscone Center West’s third-floor mezzanine.

About OneSpin Solutions

OneSpin Solutions has emerged as a leader in formal verification through a range of advanced electronic design automation (EDA) solutions for digital integrated circuits. Headquartered in Munich, Germany, OneSpin is passionate about enabling users to address design challenges in areas where reliability really counts: safety-critical verification, SystemC/C++ high-level synthesis (HLS) code analysis and FPGA equivalence checking. OneSpin’s advanced formal verification platform and dedication to getting it right the first time have fueled dramatic growth over the past five years as the company forges partnerships with leading electronics suppliers to pursue design perfection. OneSpin: Making Electronics Reliable.

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Twitter: @OneSpinSolution