The Road to embedded world '23: Chandler, Arizona, Everspin

By Chad Cox

Production Editor

Embedded Computing Design

February 13, 2023


The Road to embedded world '23: Chandler, Arizona, Everspin
Image Credit: Everspin Technologies

I have mentioned it before on our Road to embedded world, I love staying close to home. On a short trip, we visit Everspin Technologies where we are treated to view its EM064LX, a high performing persistent memory capable of reading 400 Megabytes per second connected to eXpanded SPI interface, and byte level addressability The EM064LX has over 4X the capacity of earlier serial non-volatile memories, and is a long-term solution with the user not having to worry about wear. It will retain its data for >100 years at 70 degrees Celsius. Everspin will be presenting the future of unified memory at embedded world 2023.


While visiting embedded world make a stop by booth 3A-201 where Everspin will demonstrate how its platforms are replacing technologies such as SRAM, nvSRAM, and NOR memories in application areas such as Industrial IoT, Process Automation and Control, FPGA Configuration, Aero/Avionics, Medical, and Gaming.

The highlights tthat you will see demonstrated at embedded world include: 

  • Expanded SPI bus interface supporting
    • Octal, Quad, Dual and Single SPI protocol
  • Up to 200MHz single and double transfer rate (STR/DTR) for Octal SPI
  • Up to 133MHz, SPI, DSPI, QSPI
  • Data endurance: Unlimited read, write and erase operations for supported life of product
  • Data retention 10 Years minimum across temperature
  • JEDEC compliant: JESD251, JESD251-1
  • Byte level writes and reads with no erase required as persistent memory
  • Data integrity: No external ECC required.
  • Low Power Modes:
    • Standby < 350μA (64Mb)
    • Deep power down 50μA
  • SPI compatibility: NVSRAM, FRAM, NOR, Toggle MRAM
  • SPI, xSPI Commands for Program/Erase emulated NOR compatible Execute-in-place (XIP)
  • Volatile and nonvolatile configuration settings
    • Nonvolatile settings are not reflow protected
  • Dedicated 256-byte OTP area outside main memory
    • Readable and user-lockable
    • Permanent lock with WRITE OTP command
    • Not reflow protected
  • Erase capability
    • Chip / bulk erase and sector erase
    • Subsector erase 4KB, 32KB granularity
  • Voltage
    • 1.65–2.0V (1.8V)
  • Density:
    • EM008LX 8Mb, EM016LX 16Mb
    • EM032LX 32Mb, EM064LX 64Mb
  • 400MBps sustained throughput with OSPI at 200MHz , DTR, for reads and writes
  • Boot mode configurations
    • Boot in x1, x2, x4, x8
  • Software reset and hardware reset pin available
  • 3-byte and 4-byte address modes
  • Sequential (burst) read and writes
  • Electronic signature
    • JEDEC-standard 3-byte signature
  • JEDEC standard, RoHS compliant packages:
    • 24-ball BGA, 6mm x 8mm (5 x 5 array)
    • 8-pin DFN, 6mm x 8mm
  • Operating temperature range
    • Commercial: From 0°C to +70°C
    • Industrial: From -40°C to +85°C
  • Security and write protection
    • 16 configurable hardware write protected regions plus top/bottom select
    • Program/erase protection during power-up CRC command to detect accidental changes to user data

For more information, download the datasheet, and visit

Chad Cox. Production Editor, Embedded Computing Design, has responsibilities that include handling the news cycle, newsletters, social media, and advertising. Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature.

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