QuickLogic Integrates Synplify into Aurora PRO, Enhancing Design Speed and Performance
August 01, 2025
News
QuickLogic Corporation introduced Aurora PRO, an innovative development of the Aurora FPGA design tool. The tool integrates Synopsys Synplify FPGA synthesis enabling designers greater resource utilization and maximum frequency (Fmax). This integration results in a 50% improvement in resource use, as proven by client designs achieving over 96% LUT utilization with average frequency increases of up to 10% for eFPGA designs for enhanced system performance.
Incorporating Synplify allows engineers to build more functionality into reduced silicon footprints, diminish power consumption, and accomplish critical timing closure faster. Synplify is adapted to QuickLogic's eFPGA architecture with optimizations for embedded carry chains, BRAM, and DSP blocks. This directed synthesis considerably decreases critical path delays and accelerates design convergence, delivering improved results (QoR) which are critical for numerous industries.
Aurora PRO's user interface supports seamless integration of Synplify synthesis directly within the Aurora GUI, allowing designers to effortlessly operate highly involved area vs. timing trade-offs, accelerating experimentation, and supporting quicker iterations to attain ideal design parameters with superior flexibility.
"The introduction of Aurora PRO marks an important milestone for our eFPGA design capabilities," said Tarachand Pagarani, director of engineering at QuickLogic. "The integration of Synopsys Synplify is key to accelerating design workflows and providing advanced area and timing optimizations, empowering engineers to extract maximum performance and efficiency from QuickLogic's eFPGA technology, ultimately helping them accelerate time-to-market for innovative products."
To learn about Aurora PRO's capabilities and how it can accelerate eFPGA designs, visit https://www.quicklogic.com/efpga-ip/efpga-ip-user-tools.
For more information, visit www.quicklogic.com.
Chad Cox. Production Editor, Embedded Computing Design, has responsibilities that include handling the news cycle, newsletters, social media, and advertising. Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature.
