PICMG Announces New COM-HPC Carrier Board Design Guide

By Chad Cox

Associate Editor

Embedded Computing Design

February 18, 2022


PICMG Announces New COM-HPC Carrier Board Design Guide
Image Provided by PICMG

PICMG announced that the COM-HPC Carrier Board Design Guide is released and freely available on the PICMG website.

The 160-page design guide provides electronics engineers and PCB layout engineers comprehensive information for designing custom system carrier boards for COM-HPC modules.

Standard COM-HPC modules plug into a carrier or baseboard that is typically customized to the application. Benefits of COM-HPC are fast and cost-effective layouts with high design security for application specific embedded and edge computing boards based on open standards.

To save pins on COM-HPC modules, the sideband signals for the 10G / 25G / 40G / 100G Ethernet KR interfaces are serialized and must then be deserialized on the carrier board. The design guide provides instructions for this in a series of diagrams.

The guide provides enhanced schematics and block diagrams for all provided interfaces such as:

  • Serial ATA
  • PCI Express up to Gen 5
  • USB4
  • Boot SPI
  • eSPI
  • eDP
  • SoundWire
  • Asynchronous serial port interfaces
  • I2C/I3C
  • GPIO
  • System Management Bus (SMBus)
  • Thermal protection
  • Module type detection

PCB design rule summaries assists engineers in efficiently designing fully signal compliant COM-HPC carrier boards.

A section has been added to discuss mechanical considerations including heat spreader/module attachment, alternative board stack assemblies and board stiffeners for carrier boards.

The design guide and base specification are accompanied by a Platform Management Interface Specification, and the COM HPC EEEP.

The existing Embedded API (eAPI) specification also applies to COM-HPC. Christian Eder, chairman of the COM-HPC committee, said, "This comprehensive document will further accelerate the fast start of the COM-HPC standard. While the specification documents in themselves are already of great use for developers, the detailed Carrier Board Design Guide helps to avoid design problems, especially when handling high-speed signals, such as PCIe Gen 5 and USB4. I expect to see further time-to-market improvements for COM-HPC-based solutions.

(Note: Electronic design engineers and printed circuit board developers shall note that while the design guide contains additional detailed information it does not replace the PICMG COM-HPC specification.

For complete guidelines on the design of COM-HPC compliant carrier boards and systems, it is necessary to refer to the full specification - the design guide is not intended to be the only source for any design decisions. Besides consulting the latest COM-HPC specification, it is also strongly recommended to use the module vendors' product manuals as a reference.)

For more information, visit picmg.org.