Road to embedded world '23: Ottawa, Canada, OpenHW Group

By Chad Cox

Production Editor

Embedded Computing Design

March 02, 2023


Road to embedded world '23: Ottawa, Canada, OpenHW Group
Image Credit: OpenHW Group

In Fight Club, Tyler Durden says, “A person had to work hard for it, but a minute of perfection was worth the effort.” This always had me thinking about the first two words, “A person”, if one singular person can create a minute of perfection, what can a global team accomplish? I believe we are going to find out when we visit our friends at OpenHW Group, so off to the north!

While here in Ottawa, we will definitely be watching the Senators hit the ice and use the graceful art of checking the other team, while working as a team, fun stuff. I will just assume now the Senators will win as a team, much like how OpenHW Group is moving open-source RISC-V cores for high volume SoCs with help from its team that includes Ashling and Low Power Futures.

The news coming from OpenHW Group is that its experts will be in hall 4 booth 554 at embedded world 2023 showcasing its CORE-V MCU, CORE-V Trusted MCU, CVA6 demo, and future roadmap of the CORE-V Family.

CORE-V Family of Open-Source RISC-V Cores for High Volume Production SoCs

What is it? It is a series of RISC-V based open-source cores with associated processor subsystem IP and the tools and software for electronic system designers. These cores can be used to facilitate rapid design innovation and ensure effective manufacturability of production SoCs. 

CORE-V-VERIF has been used to execute a complete verification cycle of the CORE-V CVE4 (CV32E40P 4-stage embedded class core) and is currently being used to execute verification of additional CVE4 variants, the CVE2 (2-stage embedded class core) as well as CVA6 32 and 64bit 6-stage application class cores.

  • CORE-V-VERIF a silicon-proven, industrial-grade functional verification platform

It leverages verification components developed by the RISC-V community and will be continuously maintained and enhanced to integrate the latest best-practices and technology for the verification of future CORE-V cores for use in high-volume production SoCs.

CORE-V DevKits:

CORE-V MCU Emulation Platform

(Digilent Nexsys A7 board configured as CORE-V MCU Emulation platform)


The CORE-V MCU emulation platform integrates the CV32E40P Processor IP using the PULPissimo SoC from the PULP Platform and the Quicklogic ArticPro eFPGA. The CORE-V-MCU has been implemented on the Nexys A7 FPGA platform to support evaluation of processor functionality and software development using the CORE-V SDK.

To get started with the CORE-V-MCU, consult the CORE-V-MCU Quick Start Guide and the CORE-V-SDK Quick Start Guide




The CORE-V MCU DevKit is a turnkey development and prototyping platform for the CORE-V-MCU System on Chip. The CORE-V MCU DevKit enables makers of IoT and embedded systems to evaluate the performance of the CORE-V MCU, to interface with peripherals, and to develop and test software using the CORE-V SDK.

The CORE-V MCU DevKit includes these features

    • CV32E40P processor core
    • Quicklogic ArticPro eFPGA
  • Ashling Opella-LD onboard JTAG debug module
  • USB-C for terminal and onboard debug access
  • JTAG connector for external debug access
  • Espressif AWS IoT ExpressLink Module for AWS IoT cloud interconnect
  • mikroBUS onboard socket, allowing access to a vast range of mikroBUS modules
  • 40 pin expansion header
  • I2C temperature sensor
  • Assortment of LEDs
  • Reset button and general purpose button
  • Dimensions 75 mm x 100 mm
  • Power supply via USB-C or barrel connector (5V - 18V in)

For more information, visit

Chad Cox. Production Editor, Embedded Computing Design, has responsibilities that include handling the news cycle, newsletters, social media, and advertising. Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature.

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