Tenstorrent and Arteris Release AI Computing RISC-V Chiplets

By Chad Cox

Production Editor

Embedded Computing Design

May 10, 2023

News

Tenstorrent and Arteris Release AI Computing RISC-V Chiplets
Image Credit: Tenstorrent and Arteris

Arteris, Inc. announced Tenstorrent is leveraging its Ncore and FlexNoC interconnect IP for its AI chiplet systems. The results is a flexible network-on-chip (NoC) interconnect for next generation AI solutions. The combination of Tenstorrent’s AI chiplet’s and RISC-V's openness are tailored specifically to users’ requirements.

"We are happy to share that we are partnering with Arteris to use Ncore and FlexNoC IP in our next-generation product," said Jim Keller, CEO of Tenstorrent. "The combination of performance and features made it a great choice for both our AI chips and our high-performance RISC-V CPUs. The Arteris team and IP solved our on-chip network problems so we can focus on building our next-generation AI and RISC-V CPU products."

The solution includes Arteris' customizable coherent and non-coherent NoC Ips cache. More reliable transmission and low latency is provided by the Ncore and FlexNoC coming with advanced features such as congestion management, quality of service (QoS) and error detection and correction.

Ideal AI Solutions:

  • Edge devices
  • Edge servers
  • Cloud servers

"Tenstorrent's next-generation AI computing will further push the envelope on high-end RISC-V deep learning, which requires high-bandwidth, low-latency heterogeneous compute with interconnects to optimize data flow and overall performance," said K. Charles Janac, president and CEO of Arteris. "Our silicon-proven IP technology is built to meet the demands of such AI and ML solutions, fueling the next wave of innovation."

For more information, visit www.arteris.com

 

Chad Cox is the Production Editor at Embedded Computing Design. His responsibilities are centered around content creation, writing and editing, and article research and development. Chad covers industry news and events and is known to interact with various industrial leaders via on-premise visits and online interviews. He is responsible for the digital footprint and dissemination of news via social media posts, advertising creation and the production of newsletters including the Embedded Computing Design’s Daily.

He is well versed in many facets of industrial computing including Edge AI, IoT, Processing, Security, Open Source, and more.

Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature and holds a master’s in education.

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