Bringing Down the Duration of Hardware Design Life Cycle for Compact High Performing Architecture

By Saumitra Jagdale

Freelance Technology Writer

August 03, 2021


Bringing Down the Duration of Hardware Design Life Cycle for Compact High Performing Architecture
(Image courtesy of Sondrel)

Hardware needs to be compact for ASICs (Application Specific Integrated Chips) with complex architecture. Alongside, the demand for quick and energy efficient functionalities have shaped the circuit design conventions over time. Sondrel's architecture and design have reduced hardware design life cycles, thus lowering cost and time for deployment. It also accommodates the risk to bespoke technology requirements, ensuring the chip expectations are met from the commercial and technical point of view.

The demand for low-power compact solutions have grown at a rapid pace. Still, Application-Specific Integrated Circuit (ASIC) design entails complex challenges such as:

  • Power Consumption 
  • IP design
  • Designing and Functional Verification
  • Design for Testability

There are also higher design costs and performance issues. Furthermore, hardware designers must reduce time-to-market while maintaining a high degree of risk throughout the ASIC design workflow.

With markets demanding higher levels of integration, it is no longer feasible for a development team to design all of the functionalities required by a big System-on-Chip (SoC). Instead, development teams have turned to third-party Intellectual Property (IP) for the solution. However, the key challenge for the SoC/ASIC industry is to quickly and efficiently incorporate IP from various sources. 

By offering both cores and application-specific domain expertise, IP suppliers help product development teams to keep pace with the need to create bigger chips in very short timeframes. Thus, employing reusable cores or IP platforms is one such approach to reduce cost and thereby meet time-to-market requirements. 

Sondrel addresses these issues as it provides concept-to-silicon design solutions to technology companies and system houses across the world that require complex SoC, ASIC, or customized engineering services. Additionally, the company uses IP cores as building blocks for ASIC designs.

Instead of starting from scratch with each new design, the firm has developed reference designs that distil customer’s experience developing semiconductor architecture into reusable IP platforms. Because the IP platform has been validated and is ready to use, it lowers total design costs and risks, and reduces time to market.

Overview of Sondrel’s Family of IP Platform Based Reference Designs

Sondrel has introduced a family of reference designs that might save design costs, risk, and time by up to 30%. The company has used its experience developing hundreds of ASICs to create a collection of crucial reference designs. Each design provides fast design time for high-growth markets.

Single Channel data processing SoC

The SFA 200 is a compute SoC that connects with other SoC/PCB solutions to give a scalable performance. It uses a local endpoint data processor for data collection, analysis, and inference processing. If required, multiple SoCs can be linked together to provide scalable processing applications that support local networking.  

Credit: Datasheet

The SFA 200 architecture is proposed for fixed and mobile (battery-powered) applications such as Smart Home, Smart Metering, Sensor Fusion, and other similar applications.

ADAS Chip with built-in Functional Safety

The SFA 250A is a Scalable Single Channel Processor with an independent Functional Safety (FuSa) monitor that meets ISO 26262 ASIL D-ASIC Safety Subsystem requirements. Due to its scalability, it is easily adaptable to meet the demands of the customer's IP. It is also modular, as multiple devices may be combined to form larger systems, such as a Quad Channel ADAS Processor, x4 ASICs.

Credit: Datasheet

Thus, SFA250A focuses on FuSa applications such as Advanced Driver Assistance Systems (ADAS).

Ultra-powerful Signal and Data Processing SoC

The SFA 300 features four CPU clusters and is designed to implement scalable processing applications that support local networking. Thus, the SoC is targeted at signal and data processing, with a medium to significant performance. Because of Sondrel's expertise in low power design, the chip’s power requirements are low enough to be powered by a battery.

Credit: Datasheet

The SFA 300 enables the rapid development of custom solutions for processing-intensive applications such as 8K video, AI, face recognition for surveillance, smart factories, blockchain servers, and medical data analysis.

Autonomous Vehicle Quad-channel Processor

The quad-channel, SFA 350A IP platform is designed with ISO26262 applications and quick integration of customer IP to make it easier for clients to deploy their new chip in the automotive industry. This platform aids in the simplification and acceleration of the development of the required evidence package, ensuring that the final product can quickly achieve ISO26262.


Credit: Datasheet

The SFA 350A has been developed mainly for Advanced Driver Assistance Systems (ADAS) that support autonomous vehicle applications.

Edge AI IoT data processing solutions with high performance

The Internet of Things is about acquiring data about what is happening in a smart dwelling, factory, or office, in order to make devices smarter. The SFA 100 IP platform has been particularly built for this purpose, with a compact, powerful computation capability to automatically turn data into knowledge and add ‘smarts.'

Credit: Datasheet

SFA 100 is a reference SoC design for low-power IoT devices aimed at markets that require low-power or battery-powered endpoint devices. The device enables the integration of a machine-learning engine onto a low-cost, low-power edge device built on the Arm CorstoneTM-300 subsystem, which ensures a high degree of security.

As mentioned, Sondrel's reference family of IP platforms is targeted towards certain application areas. Each platform has been designed so that the customer's IP can be readily integrated into it, resulting in up to a 30% reduction in costs, risk, and time to market.

Besides reducing costs, the semi-custom, reusable IP platform makes it easy to provide clients with indicative pricing right from the start, so they can evaluate how cost-effective and affordable the solution will be. This can aid in determining the viability of a new project and its budget. Thus, Sondrel is a good option when it comes to a complicated digital SoC or ASIC. 

You can headover to Sondrel’s official page for more information.

Saumitra Jagdale is a Backend Developer, Freelance Technical Author, Global AI Ambassador (SwissCognitive), Open-source Contributor in Python projects, Leader of Tensorflow Community India, and Passionate AI/ML Enthusiast.

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