Codasip Launches Exploration Platform to Accelerate CHERI Adoption
May 07, 2025
News
Codasip has made an exploration platform available based on the Codasip X730 application core, which integrates CHERI (Capability Hardware Enhanced RISC Instructions).
Based on commercially available IP, Codasip Prime is designed to enable advanced development of memory-safe and secure software. The platform supports hardware and software engineers with evaluation and demonstration needs via the capabilities of CHERI technology. Users can eventually develop and run CHERI software and integrate CHERI hardware into wider test systems.
Codasip Prime features a high-performance FPGA (field programmable gate array) system, including the processor and peripherals, and a full software development kit:
- FPGA board and bitstream containing:
- Codasip X730 64bit RISC-V CHERI Application CPU
- Peripheral and system IP
- Security IP for secure boot and secure debug (True Random Number Generator, Test Access Port Protection Unit)
- CHERI-specific IP (capability tag management for DDR memory)
- Out-of-the-box Linux demonstration image
- Debug probe
- CHERI Software Development Kit
- CHERI Linux
- CHERI C/C++ tool chain, including compiler and debugger
- Secure Boot
- QEMU virtual platform matching the FPGA
According to Jamie Broome, chief product officer. “Codasip Prime allows software developers to develop and evaluate their applications before chips are built. In addition to hardware IP and software, we offer engineering support from our CHERI experts. Through our engagement with the CHERI Alliance and RISC-V International, we ensure that alignment with industry standards is maintained, enabling early adopters to trust that their integrations are future-proof.”
CHERI is also designed as a cost-effective way to protect against memory safety vulnerabilities. It is backwards compatible and allows migration to safer code, and it makes C/C++ memory safe.
Codasip is standardizing a CHERI extension for RISC-V in collaboration with other members of the CHERI Alliance, a community interest organization promoting the global adoption of CHERI security technology across the computing industry. Members of the alliance include the University of Cambridge, Google, the UK’s National Cyber Security Centre (NCSC) and the UK’s Defence Science and Technology Laboratory (DSTL).
Codasip X730 is the first commercial implementation of the new CHERI-RISC-V extension and is immediately available.
For more information, visit: https://codasip.com/
Tiera Oliver is the assistant managing editor at Embedded Computing Design. She is responsible for web content editing, product news, and story development. She also manages, edits, and develops content for ECD podcasts, including Embedded Insiders.
She utilizes her expertise in journalism and content management to oversee editorial content, coordinate with editors, and ensure high-quality output across web, print, and multimedia platforms. She manages diverse projects, assists in the production of digital magazines, and hosts company podcasts by conducting in-depth interviews with industry leaders to deliver engaging and insightful discussions.
Tiera attended Northern Arizona University, where she received her bachelor's in journalism and political science. She was also a news reporter for the student-led newspaper, The Lumberjack.
