AccelerComm Announces 5G O-RAN Standards-Compliant Base Station Accelerator Based on Silicom’s N5010 Platform
September 02, 2021
A combination of O-RAN standards-compliant Layer 1 Accelerator and server platform creates a solution that improves 5G performance while using less resources and power.
AccelerComm announced it has created a 7.2x 5G O-RAN standards-compliant base station design for either indoor or outdoor deployments utilizing Silicom’s N5010 platform. The project, developed for a 5G network infrastructure vendor, combines technology from the two companies to deliver a solution that increases reliability while reducing latency and power consumption for the most critical components of the 5G physical layer.
The design provides a low-risk, fast time-to-market solution for 5G equipment vendors to drive the O-RAN industry forward. For the design, AccelerComm’s PUSCH Decoder and the PDSCH Encoder were integrated onto the Intel® Stratix 10 DX FPGA, which is a part of Silicom’s N5010 card utilizing Intel® Open FPGA Stack (Intel® OFS) Software infrastructure, to provide a Layer 1 High PHY accelerator function.
The O-RAN Alliance is moving towards an open, intelligent, and fully interoperable approach to the deployment of the Radio Access Network (RAN) from multiple vendors. This approach enables vendors such as AccelerComm and Silicom to partner and bring their expertise to market, replacing the closed ecosystems which typically involve just a single vendor.
AccelerComm’s physical layer product portfolio includes complete channel coding uplink and downlink IP solutions that deliver reduced latency, high reliability, and low power consumption for the most critical components of the 5G physical layer. AccelerComm’s IP packages can be quickly integrated and flexibly delivered for use in custom silicon (ASIC), programmable hardware (FPGA) or as software solutions, covering all use cases within current standards.
For more information, visit AccelerComm.