CEA-Leti Scientists Demonstrate CMOS Device Fabrication at 500?C
June 23, 2020
News
VLSI 2020 Paper Details First Proof of Integration of FDSOI CMOS Devices Processed at 500°C, for Further 3D Monolithic Integration.
In an FDSOI CMOS processing breakthrough, CEA-Leti scientists have pushed fabrication thermal-process boundaries down to 500°C for CMOS integration, while showing strong performance gains especially in P-type metal-oxide-semiconductor (PMOS) logic devices.
The 500°C threshold is important because in 3D monolithic technologies (also called 3D sequential), fabricating the upper-level transistors at higher temperatures than that can damage the metal interconnects and the silicide of the bottom-level transistors. Using CEA-Leti’s CoolCube low-temperature process for top-level devices prevents deterioration of bottom-level transistors.
In addition, the CEA-Leti team demonstrated for the first time, ring oscillators and SRAM bitcells processed at 500°C, further paving the way for high-performance 3D monolithic CMOS integration, intended for advanced logic, RF, in-memory computing, AI, imaging, and display applications.
For more information, visit: www.leti-cea.com
Tiera Oliver, Assistant Managing Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She develops content and constructs ECD podcasts, such as Embedded Insiders. Before working at ECD, Tiera graduated from Northern Arizona University, where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student-led newspaper, The Lumberjack.
