PLS Expands UDE Debug Engine to Support ST Stellar P3E Automotive MCU with AI Acceleration

By Chad Cox

Production Editor

Embedded Computing Design

May 05, 2026

News

Image Credit: PLS

Lauta, Germany. PLS Programmierbare Logik & Systeme has expanded its debug, trace, and test tool UDE Universal Debug Engine to cooperate with the Stellar P3E, the latest offering from the Stellar family and ST’s first automotive MCU with an integrated AI accelerator. The Stellar P3E features a multi-core cluster of high-performance Arm Cortex-R52+ CPUs and a Neural Processing Unit (NPU).

ST’s goal is to innovate the development of highly integrated powertrain architectures and combine motor controllers, inverters, OBCs, and DC-DC converters into unified systems for hybrid and electric vehicles. The MCU offers a large, expandable memory and intelligent energy management functions.

With respect to the Stellar P3E, PLS expanded the debug, trace, and test tool UDE Universal Debug Engine to allow engineers the ability to perform real multi-core debugging for the MCU part of the device. According to the press release, all cores of the Cortex-R52+ multicore cluster are visible within a common, unified debugger instance and can be controlled from within it.

The UDE Multi-Core Run Control guarantees full synchronization of all cores during debugging. Contingent on the scenario, cores can be started and stopped individually while multi-core breakpoints, which can be used in shared code, simplify the debugging of complex applications.

The UAD2pro, UAD2next, and UAD3+ devices from PLS’ Universal Access Device family, combined with the corresponding target adapter, complements the debugger tool UDE ensuring consistent communication with the Stellar P3E MCUs via JTAG or Serial Wire Debug (SWD). If being used in an electrically demanding development environment, galvanically isolated adapters are an optional upgrade, supporting potential isolation up to 1,000 volts.

UDE uses recorded trace data from the Stellar P3E for non-invasive debugging and a more extensive runtime analysis with function or task executions over the time visualized. The recording of large amounts of trace data can be done either with UAD2next or in the UAD3+.

512 MB of trace memory is available in the UAD2next and up to 8 GB in the UAD3+. For fast download of the trace data from the chip to UDE, the UAD2next and UAD3+ offers a multi Gbit/s high-speed serial trace interface based on the Aurora protocol. UAD3+ Serial Trace Pod 100G has an overall trace bandwidth of up to 100 Gbit/s.

Due to the collaboration between PLS and ST through the ST Partner Program, early adopters are now utilizing UDE's debugging, testing, tracing, and system analysis features with future mass production of the silicon scheduled to begin at the end of 2026.

For more information, visit pls-mc.com.
 

Chad Cox is the Production Editor at Embedded Computing Design. His responsibilities are centered around content creation, writing and editing, and article research and development. Chad covers industry news and events and is known to interact with various industrial leaders via on-premise visits and online interviews. He is responsible for the digital footprint and dissemination of news via social media posts, advertising creation and the production of newsletters including the Embedded Computing Design’s Daily.

He is well versed in many facets of industrial computing including Edge AI, IoT, Processing, Security, Open Source, and more.

Chad graduated from the University of Cincinnati with a B.A. in Cultural and Analytical Literature and holds a master’s in education.

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