RISC-V International Announces Inception of Fast Track Architecture Extension Process

By Perry Cohen

Associate Editor

Embedded Computing Design

February 26, 2021


RISC-V International Announces Inception of Fast Track Architecture Extension Process
(Image courtesy of RISC-V International)

RISC-V International announced its Fast Track Architecture Extension Process (Fast Track) that streamlines the ratification of small architecture extensions.

The organization said that ZiHintPause is the first extension to be ratified under the new process.

ZiHintPause allows engineers to reduce energy consumption of their designs. It further assists in improving the performance of spin-wait loops and lets multithreaded cores relinquish extensions resources.

According to an organization press release, Fast Track defines the process for developing and standardizing architecture extensions that meet specific criteria, while providing reasonable quality control under the oversight and approval of the relevant RISC-V standing committee.

Further, it was designed for extensions that are uncontentious and offers value to the RISC-V community, in addition to fitting within the existing RISC-V architecture.

The organization stated that all extensions submitted will undergo a 45-day public review process.

For more information, visit https://riscv.org/.

Perry Cohen, associate editor for Embedded Computing Design, is responsible for web content editing and creation, podcast production, and social media efforts. Perry has been published on both local and national news platforms including KTAR.com (Phoenix), ArizonaSports.com (Phoenix), AZFamily.com, Cronkite News, and MLB/MiLB among others. Perry received a BA in Journalism from the Walter Cronkite School of Journalism and Mass Communications at Arizona State university.

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