Intel Launches $1 Billion Fund to Build a Foundry Innovation Ecosystem

By Tiera Oliver

Associate Editor

Embedded Computing Design

February 07, 2022


Intel Launches $1 Billion Fund to Build a Foundry Innovation Ecosystem

Intel announced a new $1 billion fund to support early-stage startups and established companies building disruptive technologies for the foundry ecosystem.

A collaboration between Intel Capital and Intel Foundry Services (IFS), the fund will prioritize investments in capabilities that accelerate foundry customers’ time to market – spanning intellectual property (IP), software tools, innovative chip architectures, and advanced packaging technologies.

Intel also announced partnerships with several companies aligned with this fund and focused on key strategic industry inflections: enabling modular products with an open chiplet platform and supporting design approaches that leverage multiple instruction set architectures (ISAs), spanning x86, Arm and RISC-V.

“Foundry customers are rapidly embracing a modular design approach to differentiate their products and accelerate time to market. Intel Foundry Services is well-positioned to lead this major industry inflection. With our new investment fund and open chiplet platform, we can help drive the ecosystem to develop disruptive technologies across the full spectrum of chip architectures.” –Pat Gelsinger, Intel CEO

How It Works: As a key part of its IDM 2.0 strategy, Intel recently established IFS to help meet the growing global demand for advanced semiconductor manufacturing. In addition to providing packaging and process technology and committed capacity in the U.S. and Europe, IFS is positioned to offer the foundry industry’s broadest portfolio of differentiated IP, including all of the leading ISAs.

A robust ecosystem is critical to helping foundry customers bring their designs to life using IFS technologies. The new innovation fund was created to strengthen the ecosystem in three ways:

  • Equity investments in disruptive startups.
  • Strategic investments to accelerate partner scale-up.
  • Ecosystem investments to develop disruptive capabilities supporting IFS customers.

About the Open RISC-V Ecosystem: A key part of the IFS strategy is to offer a range of leadership IP optimized for Intel process technologies. IFS is the only foundry to offer IP optimized for all three of the industry’s leading ISAs: x86, Arm, and RISC-V.

As part of the new innovation fund, Intel is planning investments and offerings that will strengthen the ecosystem and help drive further adoption of RISC-V. The fund will help disruptive RISC-V companies innovate faster through IFS by collaborating on technology co-optimization, prioritizing wafer shuttles, supporting customer designs, building development boards and software infrastructure, and more.

Intel is joining forces with partners in the RISC-V ecosystem, including Andes Technology, Esperanto Technologies, SiFive, and Ventana Micro Systems. IFS plans to offer a range of validated RISC-V IP cores, performance-optimized for different market segments. By partnering with providers, IFS will optimize IP for Intel process technologies to ensure that RISC-V runs best on IFS silicon across all types of cores, from embedded to high-performance. Three types of RISC-V offerings will be made available:

  • Partner products manufactured on IFS technologies.
  • RISC-V cores licensed as differentiated IP.
  • Chiplet building blocks based on RISC-V, leveraging advanced packaging and high-speed chip-to-chip interfaces.

See “Fact Sheet: Catalyzing the RISC-V Ecosystem” to learn more about how IFS is catalyzing the RISC-V ecosystem with leading partners.

In addition to hardware and IP, IFS will sponsor an open-source software development platform that allows for freedom in experimentation, including partners across the ecosystem, universities, and consortia. To further this program, the company announced that it is joining RISC-V International, a global nonprofit organization supporting the free and open RISC-V instruction set architecture and extensions.

About the Open Chiplet Platform: With the advent of advanced 3D packaging technologies, chip architects are increasingly adopting a modular approach to design – moving from system-on-chip to system-on-package architectures. This provides a way to partition complex semiconductors into modular blocks called “chiplets.” Each block is customized for a particular function, providing designers incredible flexibility to mix and match the best IP and process technologies for the product application. The ability to reuse IP also shortens development cycles and reduces the time and cost of bringing a product to market.

While there are opportunities in many segments, the data center market is one of the first to adopt modular architectures. Many cloud service providers (CSPs) are looking to create customized compute machines that incorporate accelerators, with the goal of improving data center performance for workloads such as artificial intelligence. Closely integrating accelerator chiplets in the same package as a data center CPU enables higher performance and reduced power compared to placing accelerator cards near CPU boards.

Truly tapping the power of modular architectures requires an open ecosystem since the approach brings together design IP and process technologies from multiple vendors. IFS is enabling this ecosystem with its open chiplet platform, co-developed with CSPs to accelerate the platform and package integration of customers’ accelerator IP. The platform will leverage Intel’s leadership packaging capabilities with IP optimized for IFS’ advanced process technologies, combined with services to accelerate customer time to market with integration and validation.

Additionally, Intel is committed to partnering with other industry leaders to develop an open standard for a die-to-die interconnect that allows chiplets to communicate with each other at high speeds. Leveraging a strong track record of widely deployed standards - such as USB, PCI Express and CXL - the industry can drive a new, open ecosystem that will enable interoperable chiplets from different foundries and process nodes to be packaged using a wide variety of technologies.

The new open chiplet platform is seeing strong momentum with customers who value the ability to integrate accelerators optimized to new and evolving data center workloads.

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Tiera Oliver, Associate Editor for Embedded Computing Design, is responsible for web content edits, product news, and constructing stories. She also assists with newsletter updates as well as contributing and editing content for ECD podcasts and the ECD YouTube channel. Before working at ECD, Tiera graduated from Northern Arizona University where she received her B.S. in journalism and political science and worked as a news reporter for the university’s student led newspaper, The Lumberjack.

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