Menta and Mentor Partner for High-Level Synthesis of Embedded FPGA IP

April 02, 2019

Press Release

Menta and Mentor Partner for High-Level Synthesis of Embedded FPGA IP

Combination of Menta eFPGA and Mentor's Catapult HLS design flow simplifies development of SoCs featuring unprecedented flexibility and programmability


Menta SAS, a provider of embedded FPGA (eFPGA) Intellectual Property (IP), today announced a collaboration with Mentor, a Siemens business, to provide High-Level Synthesis (HLS) of the industry’s most flexible eFPGA technology.

Mentor’s Catapult™ HLS design tools provide an integrated development environment allowing designers to go from SystemC & C++ to eFPGA quickly and seamlessly while taking advantage of the fully customizable FPGA fabric provided by Menta. Menta’s IP is unique in allowing engineers to customize the eFPGA fabric to support the requirements of any application on any process node. Designers can specify the size and number of embedded logic blocks (eLBs), global clocks, memory, ALUs, and interfaces as required by any user application. SoCs that incorporate eFPGAs from Menta are ideal for emerging consumer, industrial, automotive and wireless applications, which require programmability for software and algorithm updates as standards evolve and change.

“Menta’s eFPGA IP offers a new level of configurability for SoCs, and Catapult HLS delivers a significantly reduced time to implementation compared to hand-coded RTL,” said Ellie Burns, director of marketing, Digital Design Implementation Solutions at Mentor. “Together we can deliver a paradigm shift for SoC design that enables both a faster path from algorithm to optimized hardware and deliverable as a field upgrade to the SoC.”

The Catapult HLS design flow allows engineers to change the eFPGA configuration at any stage of development, customizing the logic, control and memory blocks. Menta’s eFPGA fabric also supports third party IP and memory blocks, unlike any other eFPGA on the market. With the ability to optimize and re-use register transfer level (RTL) code, the new design environment speeds development. Menta’s Origami programmer tool is also fully integrated into the flow to support design from HDL to bitstream with synthesis, mapping, place and route.

“The close collaboration between Mentor and Menta brings a significant value add to our customers across a variety of market segments,” said Vincent Markus, CEO of Menta. “Our engineering teams are working closely with each other and with customers to provide a faster and more efficient path to market of eFPGA-enabled SoCs.”

The integrated Catapult and eFPGA design and development environment is available now. For more information, please visit, or contact our customer support team at [email protected].




About Menta

Menta is a privately held company based in Montpellier, France. The company provides embedded FPGA (eFPGA) technology for System on Chip (SoC), ASIC or System in Package (SiP) designs, from EDA tools to IP generation. Menta's programmable logic architecture is based on scalable, customizable and easily programmable architecture created to provide programmability for next-generation ASIC design with the benefits of FPGA design flexibility. For more information, visit the company website at:

Origami Designer, Origami Programmer and eFPGA Core IP are registered trademarks of Menta SAS. Mentor Graphics, Mentor and Catapult are trademarks or registered trademarks of Mentor Graphics Corporation. All other trademarks and tradenames are the property of their respective holders.