SEGGER Embedded Studio Supports RISC-V RV64I/E/GC 64-bit CPUs

By Brandon Lewis


Embedded Computing Design

December 09, 2021


Support for RV64I, RV64E, and RV64GC with floating-point unit RISC-V CPUs has been added to the latest version of SEGGER Embedded Studio. The 64-bit CPU IP cores will benefit from SEGGER emRun C/C++ runtime, emFloat floating-point libraries, SEGGER Linker, and SEGGER Compiler, which combine in the environment to help developers generate compact, efficient code.

“We are committed to broad RISC-V support, from small 32-bit through high-end 64-bit cores, from simple debug to flash programming and real-time trace,” says Ivo Geilenbruegge, Managing Director of SEGGER. “One IDE fits all.”

The platform natively supports J-Link debuggers, plus third-party probes through GDB remote protocol integration. J-Link supports all standard 32/64-bit RISC-V cores including non-intrusive background, system-bus memory access, and Real-Time Transfer (RTT).

Other features of note in Embedded Studio include an open flash loader interface for direct downloads into flash memory. This gives users the ability to flash program new devices and/or access a wide range of SEGGER-supported flash devices.

The IDE also includes the GNU compiler and linker.

Information on SEGGER’s RISC-V Evaluation Software is available at

More on SEGGER’s RISC-V support can be found at

Brandon is responsible for guiding content strategy, editorial direction, and community engagement across the Embedded Computing Design ecosystem. A 10-year veteran of the electronics media industry, he enjoys covering topics ranging from development kits to cybersecurity and tech business models. Brandon received a BA in English Literature from Arizona State University, where he graduated cum laude. He can be reached at [email protected]

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