Two approaches to protecting data in SSDs
March 20, 2015
Solid-state drives (SSDs) are a nearly perfect fit for the embedded sector, as long as power remains reliable.
Rugged characteristics, such as shock and vibration resistance and wide operating temperature range, are now common in embedded SSDs. But without robust power protection, data reliability can be severely compromised in the event of unexpected power loss.
As a disruptive technology, SSDs have been displacing slower traditional hard disks in a diverse array of applications from consumer laptops to enterprise data centers to industrial embedded systems. Besides offering faster I/O performance, having no moving parts means that SSDs consume less power and are inherently more resistant to shock and vibration, making them suitable for the harsh environments industrial and embedded systems are often deployed in.
Unlike SSDs in enterprise data centers that have redundant backup power generators and scheduled data backups, SSDs deployed in industrial and embedded systems often store critical data while operating in harsh environments with unreliable power.
The rugged characteristics of SSDs make them reliable data storage solutions for embedded and industrial use, but again, only if the power loss problem is addressed. While reading from flash is straightforward, writing to flash is more complex, and most SSDs use a volatile DRAM cache to optimize write operations. These DRAM buffers improve SSD performance and service life by caching I/O operations and spreading writes around the drive. Because DRAM is a volatile storage medium however, in the event of unexpected power loss, critical data stored in these buffers can be irretrievably lost unless power protection strategies are in place.
Magnetic media can be overwritten in place, but writing to flash memory requires the data previously stored to be erased first. Thus, each write is no longer a single operation but an erase, then a program (PE) operation. In addition, while read operations can read a small data cell at a time, PE cycles operate at the block level. Erasing a large block just to write to one cell is inefficient, so write operations are often cached before being written to flash a block at a time.
Implementing a write buffer allows the SSDs to achieve a high number of operations per second. At the same time, by using volatile DRAM, they present a serious challenge in terms of data reliability in dirty power conditions. When power is lost unexpectedly, all buffer contents need to be flushed to non-volatile storage or data loss or corruption can occur.
Power protection strategies
Protecting SSDs from the risk of data loss in unreliable power conditions can take the form of a combined hardware/firmware approach. Using a voltage detection circuit, low-voltage scenarios are immediately detected, triggering the data protection scheme. I/O operations are halted and input power is cut off while residual power stored in onboard capacitors discharges to allow the contents of the volatile DRAM cache to be flushed to non-volatile flash memory. One such technology is Innodisk’s iCell.
Another approach to the power loss problem is eliminating the source of the issue. DRAM-less SSDs remove the volatile DRAM data buffer from the equation, making power loss protection simpler as critical data is never stored in volatile DRAM. For write optimization purposes, a smaller SRAM buffer is used instead. By using a small capacity of fast (albeit more expensive) SRAM, this design can be flushed to flash quickly in the event of unexpected loss of power.
The best grade industrial SSDs can take either a combined firmware and hardware power-protection approach, or a simpler DRAM-less design to implement power protection for flash data integrity. Both choices have their own benefits and the decision comes down to cost and performance, with DRAM-less SSDs offering the price advantage, while power-protected SSDs using DRAM offer a balance of performance and power protection.
C.C. Wu is a Vice President at Innodisk and Director of the Embedded Flash Division. He is a frequent presenter at the annual Flash Memory Summit and speaks on the topics of NAND Flash technology and embedded systems storage.